Datasheet

123
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
Figure 15-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the output compare (OC2x) from the waveform generator if either of the
COM2x1:0 bits are set. However, the OC2x pin direction (input or output) is still controlled by the data direction register
(DDR) for the port pin. The data direction register bit for the OC2x pin (DDR_OC2x) must be set as output before the OC2x
value is visible on the pin. The port override function is independent of the waveform generation mode.
The design of the output compare pin logic allows initialization of the OC2x state before the output is enabled. Note that
some COM2x1:0 bit settings are reserved for certain modes of operation. See Section 15.8 “8-bit Timer/Counter Register
Description” on page 129
15.5.1 Compare Output Mode and Waveform Generation
The waveform generator uses the COM2x1:0 bits differently in normal, CTC, and PWM modes. For all modes, setting the
COM2x1:0 = 0 tells the waveform generator that no action on the OC2x register is to be performed on the next compare
match. For compare output actions in the non-PWM modes refer to Table 15-5 on page 130. For fast PWM mode, refer to
Table 15-6 on page 130, and for phase correct PWM refer to Table 15-7 on page 130.
A change of the COM2x1:0 bits state will have effect at the first compare match after the bits are written. For non-PWM
modes, the action can be forced to have immediate effect by using the FOC2x strobe bits.
15.6 Modes of Operation
The mode of operation, i.e., the behavior of the Timer/Counter and the output compare pins, is defined by the combination of
the waveform generation mode (WGM22:0) and compare output mode (COM2x1:0) bits. The compare output mode bits do
not affect the counting sequence, while the waveform generation mode bits do. The COM2x1:0 bits control whether the
PWM output generated should be inverted or not (inverted or non-inverted PWM). For non-PWM modes the COM2x1:0 bits
control whether the output should be set, cleared, or toggled at a compare match (see Section 15.5 “Compare Match Output
Unit” on page 122).
For detailed timing information refer to Section 15.7 “Timer/Counter Timing Diagrams” on page 127.
DATA BUS
0
1
QD
COMnx1
COMnx0
FOCn
OCnx
Waveform
Generator
QD
PORT
QD
DDR
OCnx
Pin
clk
I/O