Datasheet

327
7766E–AVR–04/10
ATmega16U4/ATmega32U4
26.7 ATmega16U4/ATmega32U4 Boundary-scan Order
Table 26-3 shows the Scan order between TDI and TDO when the Boundary-scan chain is
selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit scanned out. The
scan order follows the pin-out order as far as possible. Exceptions from the rules are the Scan
chains for the analog circuits, which constitute the most significant bits of the scan chain regard-
less of which physical pin they are connected to. In Figure 26-3, PXn. Data corresponds to FF0,
PXn. Control corresponds to FF1, PXn. Bit 4, 5, 6 and 7 of Port F is not in the scan chain, since
these pins constitute the TAP pins when the JTAG is enabled. The USB pads are not included in
the boundary-scan.
Table 26-3. ATmega16U4/ATmega32U4 Boundary-scan Order
Bit Number Signal Name Module
88 PE6.Data
Port E
87 PE6.Control
86 Reserved
85 Reserved
84 Reserved
83 Reserved
82 PB0.Data
Port B
81 PB0.Control
80 PB1.Data
79 PB1.Control
78 PB2.Data
77 PB2.Control
76 PB3.Data
75 PB3.Control
74 PB4.Data
73 PB4.Control
72 PB5.Data
71 PB5.Control
70 PB6.Data
69 PB6.Control
68 PB7.Data
67 PB7.Control
66 Reserved
PORTE
65 Reserved
64 Reserved
63 Reserved
62 RSTT Reset Logic (Observe Only)