Datasheet

258
7766E–AVR–04/10
ATmega16U4/ATmega32U4
Figure 21-8. USB Interrupt System
The USB hardware module distinguishes between USB General events and USB Endpoint
events that are relevant with data transfers relative to each endpoint.
Figure 21-9. USB General interrupt vector sources
Almost all these interrupts are time-relative events that will be detected only if the USB clock is
enabled (FRZCLK bit set), except for:
• VBUS plug-in detection (insert, remove)
• WAKEUP interrupt that will trigger each time a state change is detected on the data lines.
This asynchronous interrupts allow to wake-up a device that is in power-down mode, generally
after that the USB has entered the Suspend state.
USB General
Interrupt
USB Device
Interrupt
USB General
Interrupt Vector
Endpoint
Interrupt
USB Endpoint/Pipe
Interrupt Vector
VBUSTI
USBINT.0
VBUSTE
USBCON.0
USB General
Interrupt Vector
UPRSMI
UDINT.6
UPRSME
UDIEN.6
EORSMI
UDINT.5
EORSME
UDIEN.5
WAKEUPI
UDINT.4
WAKEUPE
UDIEN.4
EORSTI
UDINT.3
EORSTE
UDIEN.3
SOFI
UDINT.2
SOFE
UDIEN.2
SUSPI
UDINT.0
SUSPE
UDIEN.0
USB Device
Interrupt
USB General
Interrupt Vector
Asynchronous Interrupt source
(allows the CPU to wake up from power down mode)