Datasheet

23
ATmega32A [DATASHEET]
Atmel-8155D-AVR-ATmega32A-Datasheet_02/2014
9. System Clock and Clock Options
9.1 Clock Systems and their Distribution
Figure 9-1 presents the principal clock systems in the AVR and their distribution. All of the clocks need not be
active at a given time. In order to reduce power consumption, the clocks to modules not being used can be halted
by using different sleep modes, as described in ““Power Management and Sleep Modes” on page 31. The clock
systems are detailed Figure 9-1.
Figure 9-1. Clock Distribution
9.1.1 CPU Clock – clk
CPU
The CPU clock is routed to parts of the system concerned with operation of the AVR core. Examples of such mod-
ules are the General Purpose Register File, the Status Register and the data memory holding the Stack Pointer.
Halting the CPU clock inhibits the core from performing general operations and calculations.
9.1.2 I/O Clock – clk
I/O
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and USART. The I/O clock is
also used by the External Interrupt module, but note that some external interrupts are detected by asynchronous
logic, allowing such interrupts to be detected even if the I/O clock is halted. Also note that address recognition in
the TWI module is carried out asynchronously when clk
I/O
is halted, enabling TWI address reception in all sleep
modes.
9.1.3 Flash Clock – clk
FLASH
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simultaneously with the
CPU clock.
General I/O
Modules
Asynchronous
Timer/Counter
ADC CPU Core RAM
clk
I/O
clk
ASY
AVR Clock
Control Unit
clk
CPU
Flash and
EEPROM
clk
FLASH
clk
ADC
Source Clock
Watchdog Timer
Watchdog
Oscillator
Reset Logic
Clock
Multiplexer
Watchdog Clock
Calibrated RC
Oscillator
Timer/Counter
Oscillator
Crystal
Oscillator
Low-frequency
Crystal Oscillator
External RC
Oscillator
External Clock