Datasheet

152
ATmega32A [DATASHEET]
Atmel-8155D-AVR-ATmega32A-Datasheet_02/2014
The recommendations of the maximum receiver baud rate error was made under the assumption that the receiver
and transmitter equally divides the maximum total error.
There are two possible sources for the receivers baud rate error. The receiver’s system clock (XTAL) will always
have some minor instability over the supply voltage range and the temperature range. When using a crystal to gen-
erate the system clock, this is rarely a problem, but for a resonator the system clock may differ more than 2%
depending of the resonators tolerance. The second source for the error is more controllable. The baud rate gener-
ator can not always do an exact division of the system frequency to get the baud rate wanted. In this case an
UBRR value that gives an acceptable low error can be used if possible.
20.9 Multi-processor Communication Mode
Setting the Multi-processor Communication mode (MPCM) bit in UCSRA enables a filtering function of incoming
frames received by the USART Receiver. Frames that do not contain address information will be ignored and not
put into the receive buffer. This effectively reduces the number of incoming frames that has to be handled by the
CPU, in a system with multiple MCUs that communicate via the same serial bus. The Transmitter is unaffected by
the MPCM setting, but has to be used differently when it is a part of a system utilizing the Multi-processor Commu-
nication mode.
If the receiver is set up to receive frames that contain 5 to 8 data bits, then the first stop bit indicates if the frame
contains data or address information. If the receiver is set up for frames with nine data bits, then the ninth bit
(RXB8) is used for identifying address and data frames. When the frame type bit (the first stop or the ninth bit) is
one, the frame contains an address. When the frame type bit is zero the frame is a data frame.
The Multi-processor Communication mode enables several slave MCUs to receive data from a master MCU. This
is done by first decoding an address frame to find out which MCU has been addressed. If a particular Slave MCU
has been addressed, it will receive the following data frames as normal, while the other slave MCUs will ignore the
received frames until another address frame is received.
20.9.1 Using MPCM
For an MCU to act as a master MCU, it can use a 9-bit character frame format (UCSZ = 7). The ninth bit (TXB8)
must be set when an address frame (TXB8 = 1) or cleared when a data frame (TXB = 0) is being transmitted. The
slave MCUs must in this case be set to use a 9-bit character frame format.
The following procedure should be used to exchange data in Multi-processor Communication mode:
1. All slave MCUs are in Multi-processor Communication mode (MPCM in UCSRA is set).
2. The Master MCU sends an address frame, and all slaves receive and read this frame. In the Slave MCUs,
the RXC Flag in UCSRA will be set as normal.
3. Each Slave MCU reads the UDR Register and determines if it has been selected. If so, it clears the
MPCM bit in UCSRA, otherwise it waits for the next address byte and keeps the MPCM setting.
4. The addressed MCU will receive all data frames until a new address frame is received. The other slave
MCUs, which still have the MPCM bit set, will ignore the data frames.
5. When the last data frame is received by the addressed MCU, the addressed MCU sets the MPCM bit and
waits for a new address frame from Master. The process then repeats from 2.
Using any of the 5-bit to 8-bit character frame formats is possible, but impractical since the receiver must change
between using n and n+1 character frame formats. This makes full-duplex operation difficult since the transmitter
and receiver uses the same character size setting. If 5-bit to 8-bit character frames are used, the transmitter must
be set to use two stop bit (USBS = 1) since the first stop bit is used for indicating the frame type.
Do not use Read-Modify-Write instructions (SBI and CBI) to set or clear the MPCM bit. The MPCM bit shares the
same I/O location as the TXC Flag and this might accidentally be cleared when using SBI or CBI instructions.