Datasheet

268
ATmega32A [DATASHEET]
Atmel-8155D-AVR-ATmega32A-Datasheet_02/2014
27.10.4 PROG_COMMANDS ($5)
The AVR specific public JTAG instruction for entering programming commands via the JTAG port. The 15-bit Pro-
gramming Command Register is selected as Data Register. The active states are the following:
• Capture-DR: The result of the previous command is loaded into the Data Register.
• Shift-DR: The Data Register is shifted by the TCK input, shifting out the result of the previous command and
shifting in the new command.
• Update-DR: The programming command is applied to the Flash inputs
• Run-Test/Idle: One clock cycle is generated, executing the applied command (not always required, see Table
26-15 below).
27.10.5 PROG_PAGELOAD ($6)
The AVR specific public JTAG instruction to directly load the Flash data page via the JTAG port. The 1024 bit Vir-
tual Flash Page Load Register is selected as Data Register. This is a virtual scan chain with length equal to the
number of bits in one Flash page. Internally the Shift Register is 8-bit. Unlike most JTAG instructions, the Update-
DR state is not used to transfer data from the Shift Register. The data are automatically transferred to the Flash
page buffer byte by byte in the Shift-DR state by an internal state machine. This is the only active state:
• Shift-DR: Flash page data are shifted in from TDI by the TCK input, and automatically loaded into the Flash
page one byte at a time.
Note: The JTAG instruction PROG_PAGELOAD can only be used if the AVR device is the first device in JTAG scan chain. If
the AVR cannot be the first device in the scan chain, the byte-wise programming algorithm must be used.
27.10.6 PROG_PAGEREAD ($7)
The AVR specific public JTAG instruction to read one full Flash data page via the JTAG port. The 1032 bit Virtual
Flash Page Read Register is selected as Data Register. This is a virtual scan chain with length equal to the number
of bits in one Flash page plus 8. Internally the Shift Register is 8-bit. Unlike most JTAG instructions, the Capture-
DR state is not used to transfer data to the Shift Register. The data are automatically transferred from the Flash
page buffer byte by byte in the Shift-DR state by an internal state machine. This is the only active state:
• Shift-DR: Flash data are automatically read one byte at a time and shifted out on TDO by the TCK input. The
TDI input is ignored.
Note: The JTAG instruction PROG_PAGEREAD can only be used if the AVR device is the first device in JTAG scan chain. If
the AVR cannot be the first device in the scan chain, the byte-wise programming algorithm must be used.
27.10.7 Data Registers
The Data Registers are selected by the JTAG Instruction Registers described in section “Programming Specific
JTAG Instructions” on page 284. The Data Registers relevant for programming operations are:
• Reset Register
• Programming Enable Register
• Programming Command Register
• Virtual Flash Page Load Register
• Virtual Flash Page Read Register
27.10.8 Reset Register
The Reset Register is a Test Data Register used to reset the part during programming. It is required to reset the
part before entering programming mode.
A high value in the Reset Register corresponds to pulling the external Reset low. The part is reset as long as there
is a high value present in the Reset Register. Depending on the Fuse settings for the clock options, the part will
remain reset for a Reset Time-out Period (refer to “Clock Sources” on page 26) after releasing the Reset Register.