Datasheet
Table Of Contents
- Features
- 1. Pin Configurations
- 2. Overview
- 3. Resources
- 4. Data Retention
- 5. About Code Examples
- 6. Capacitive touch sensing
- 7. AVR CPU Core
- 8. AVR Memories
- 9. System Clock and Clock Options
- 10. Power Management and Sleep Modes
- 11. System Control and Reset
- 12. Interrupts
- 13. I/O Ports
- 13.1 Overview
- 13.2 Ports as General Digital I/O
- 13.3 Alternate Port Functions
- 13.4 Register Description
- 13.4.1 SFIOR – Special Function I/O Register
- 13.4.2 PORTA – Port A Data Register
- 13.4.3 DDRA – Port A Data Direction Register
- 13.4.4 PINA – Port A Input Pins Address
- 13.4.5 PORTB – Port B Data Register
- 13.4.6 DDRB – Port B Data Direction Register
- 13.4.7 PINB – Port B Input Pins Address
- 13.4.8 PORTC – Port C Data Register
- 13.4.9 DDRC – Port C Data Direction Register
- 13.4.10 PINC – Port C Input Pins Address
- 13.4.11 PORTD – Port D Data Register
- 13.4.12 DDRD – Port D Data Direction Register
- 13.4.13 PIND – Port D Input Pins Address
- 14. External Interrupts
- 15. 8-bit Timer/Counter0 with PWM
- 16. Timer/Counter0 and Timer/Counter1 Prescalers
- 17. 16-bit Timer/Counter1
- 17.1 Features
- 17.2 Overview
- 17.3 Accessing 16-bit Registers
- 17.4 Timer/Counter Clock Sources
- 17.5 Counter Unit
- 17.6 Input Capture Unit
- 17.7 Compare Match Output Unit
- 17.8 Modes of Operation
- 17.9 Timer/Counter Timing Diagrams
- 17.10 Register Description
- 17.10.1 TCCR1A – Timer/Counter1 Control Register A
- 17.10.2 TCCR1B – Timer/Counter1 Control Register B
- 17.10.3 TCNT1H and TCNT1L – Timer/Counter1
- 17.10.4 OCR1AH and OCR1AL – Output Compare Register 1 A
- 17.10.5 OCR1BH and OCR1BL – Output Compare Register 1 B
- 17.10.6 ICR1H and ICR1L – Input Capture Register 1
- 17.10.7 TIMSK – Timer/Counter Interrupt Mask Register(1)
- 17.10.8 TIFR – Timer/Counter Interrupt Flag Register
- 18. 8-bit Timer/Counter2 with PWM and Asynchronous Operation
- 18.1 Features
- 18.2 Overview
- 18.3 Timer/Counter Clock Sources
- 18.4 Counter Unit
- 18.5 Output Compare Unit
- 18.6 Compare Match Output Unit
- 18.7 Modes of Operation
- 18.8 Timer/Counter Timing Diagrams
- 18.9 Asynchronous Operation of the Timer/Counter
- 18.10 Timer/Counter Prescaler
- 18.11 Register Description
- 18.11.1 TCCR2 – Timer/Counter Control Register
- 18.11.2 TCNT2 – Timer/Counter Register
- 18.11.3 OCR2 – Output Compare Register
- 18.11.4 ‘ASSR – Asynchronous Status Register
- 18.11.5 TIMSK – Timer/Counter Interrupt Mask Register
- 18.11.6 TIFR – Timer/Counter Interrupt Flag Register
- 18.11.7 SFIOR – Special Function IO Register
- 19. SPI – Serial Peripheral Interface
- 20. USART
- 20.1 Features
- 20.2 Overview
- 20.3 Clock Generation
- 20.4 Frame Formats
- 20.5 USART Initialization
- 20.6 Data Transmission – The USART Transmitter
- 20.7 Data Reception – The USART Receiver
- 20.8 Asynchronous Data Reception
- 20.9 Multi-processor Communication Mode
- 20.10 Accessing UBRRH/ UCSRC Registers
- 20.11 Register Description
- 20.12 Examples of Baud Rate Setting
- 21. Two-wire Serial Interface
- 22. Analog Comparator
- 23. Analog to Digital Converter
- 24. JTAG Interface and On-chip Debug System
- 25. IEEE 1149.1 (JTAG) Boundary-scan
- 26. Boot Loader Support – Read-While-Write Self-Programming
- 26.1 Features
- 26.2 Overview
- 26.3 Application and Boot Loader Flash Sections
- 26.4 Read-While-Write and no Read-While-Write Flash Sections
- 26.5 Boot Loader Lock Bits
- 26.6 Entering the Boot Loader Program
- 26.7 Addressing the Flash during Self-Programming
- 26.8 Self-Programming the Flash
- 26.8.1 Performing Page Erase by SPM
- 26.8.2 Filling the Temporary Buffer (Page Loading)
- 26.8.3 Performing a Page Write
- 26.8.4 Using the SPM Interrupt
- 26.8.5 Consideration while Updating BLS
- 26.8.6 Prevent Reading the RWW Section during Self-Programming
- 26.8.7 Setting the Boot Loader Lock Bits by SPM
- 26.8.8 EEPROM Write Prevents Writing to SPMCR
- 26.8.9 Reading the Fuse and Lock Bits from Software
- 26.8.10 Preventing Flash Corruption
- 26.8.11 Programming Time for Flash when using SPM
- 26.8.12 Simple Assembly Code Example for a Boot Loader
- 26.8.13 Boot Loader Parameters
- 26.9 Register Description
- 27. Memory Programming
- 27.1 Program And Data Memory Lock Bits
- 27.2 Fuse Bits
- 27.3 Signature Bytes
- 27.4 Calibration Byte
- 27.5 Page Size
- 27.6 Parallel Programming Parameters, Pin Mapping, and Commands
- 27.7 Parallel Programming
- 27.7.1 Enter Programming Mode
- 27.7.2 Considerations for Efficient Programming
- 27.7.3 Chip Erase
- 27.7.4 Programming the Flash
- 27.7.5 Programming the EEPROM
- 27.7.6 Reading the Flash
- 27.7.7 Reading the EEPROM
- 27.7.8 Programming the Fuse Low Bits
- 27.7.9 Programming the Fuse High Bits
- 27.7.10 Programming the Lock Bits
- 27.7.11 Reading the Fuse and Lock Bits
- 27.7.12 Reading the Signature Bytes
- 27.7.13 Reading the Calibration Byte
- 27.7.14 Parallel Programming Characteristics
- 27.8 SPI Serial Downloading
- 27.9 SPI Serial Programming Pin Mapping
- 27.10 Programming via the JTAG Interface
- 27.10.1 Programming Specific JTAG Instructions
- 27.10.2 AVR_RESET ($C)
- 27.10.3 PROG_ENABLE ($4)
- 27.10.4 PROG_COMMANDS ($5)
- 27.10.5 PROG_PAGELOAD ($6)
- 27.10.6 PROG_PAGEREAD ($7)
- 27.10.7 Data Registers
- 27.10.8 Reset Register
- 27.10.9 Programming Enable Register
- 27.10.10 Programming Command Register
- 27.10.11 Virtual Flash Page Load Register
- 27.10.12 Virtual Flash Page Read Register
- 27.10.13 Programming Algorithm
- 27.10.14 Entering Programming Mode
- 27.10.15 Leaving Programming Mode
- 27.10.16 Performing Chip Erase
- 27.10.17 Programming the Flash
- 27.10.18 Reading the Flash
- 27.10.19 Programming the EEPROM
- 27.10.20 Reading the EEPROM
- 27.10.21 Programming the Fuses
- 27.10.22 Programming the Lock Bits
- 27.10.23 Reading the Fuses and Lock Bits
- 27.10.24 Reading the Signature Bytes
- 27.10.25 Reading the Calibration Byte
- 28. Electrical Characteristics
- 29. Typical Characteristics
- 29.1 Active Supply Current
- 29.2 Idle Supply Current
- 29.3 Power-down Supply Current
- 29.4 Power-save Supply Current
- 29.5 Standby Supply Current
- 29.6 Pin Pull-up
- 29.7 Pin Driver Strength
- 29.8 Pin Thresholds and Hysteresis
- 29.9 BOD Thresholds and Analog Comparator Offset
- 29.10 Internal Oscillator Speed
- 29.11 Current Consumption of Peripheral Units
- 29.12 Current Consumption in Reset and Reset Pulsewidth
- 30. Register Summary
- 31. Instruction Set Summary
- 32. Ordering Information
- 33. Packaging Information
- 34. Errata
- 35. Datasheet Revision History
- Table of Contents

316
ATmega32A [DATASHEET]
Atmel-8155D-AVR-ATmega32A-Datasheet_02/2014
30. Register Summary
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
$3F ($5F) SREG I T H S V N Z C 8
$3E ($5E) SPH – – – – SP11 SP10 SP9 SP8 11
$3D ($5D) SPL SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 11
$3C ($5C) OCR0
Timer/Counter0 Output Compare Register
86
$3B ($5B) GICR INT1 INT0 INT2 – – – IVSEL IVCE 48, 71
$3A ($5A) GIFR INTF1 INTF0 INTF2
– – – – –71
$39 ($59) TIMSK OCIE2 TOIE2 TICIE1 OCIE1A OCIE1B TOIE1 OCIE0 TOIE0 87, 117, 136
$38 ($58) TIFR OCF2 TOV2 ICF1 OCF1A OCF1B TOV1 OCF0 TOV0 87, 117, 136
$37 ($57) SPMCR SPMIE RWWSB
– RWWSRE BLBSET PGWRT PGERS SPMEN 264
$36 ($56) TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN – TWIE 202
$35 ($55) MCUCR SE SM2 SM1 SM0 ISC11 ISC10 ISC01 ISC00 36, 69
$34 ($54) MCUCSR JTD ISC2 – JTRF WDRF BORF EXTRF PORF 42, 70, 251
$33 ($53) TCCR0 FOC0 WGM00 COM01 COM00 WGM01 CS02 CS01 CS00 84
$32 ($52) TCNT0 Timer/Counter0 (8 Bits) 86
$31
(1)
($51)
(1)
OSCCAL Oscillator Calibration Register 32
OCDR On-Chip Debug Register 232
$30 ($50) SFIOR ADTS2 ADTS1 ADTS0 – ACME PUD PSR2 PSR10 66,90,137,206,226
$2F ($4F) TCCR1A COM1A1 COM1A0 COM1B1 COM1B0 FOC1A FOC1B WGM11 WGM10 112
$2E ($4E) TCCR1B ICNC1 ICES1 – WGM13 WGM12 CS12 CS11 CS10 114
$2D ($4D) TCNT1H Timer/Counter1 – Counter Register High Byte 116
$2C ($4C) TCNT1L Timer/Counter1 – Counter Register Low Byte 116
$2B ($4B) OCR1AH
Timer/Counter1 – Output Compare Register A High Byte
116
$2A ($4A) OCR1AL
Timer/Counter1 – Output Compare Register A Low Byte
116
$29 ($49) OCR1BH
Timer/Counter1 – Output Compare Register B High Byte
116
$28 ($48) OCR1BL
Timer/Counter1 – Output Compare Register B Low Byte
116
$27 ($47) ICR1H Timer/Counter1 – Input Capture Register High Byte 116
$26 ($46) ICR1L Timer/Counter1 – Input Capture Register Low Byte 116
$25 ($45) TCCR2 FOC2 WGM20 COM21 COM20 WGM21 CS22 CS21 CS20 132
$24 ($44) TCNT2 Timer/Counter2 (8 Bits) 135
$23 ($43) OCR2
Timer/Counter2 Output Compare Register
135
$22 ($42) ASSR – – – – AS2 TCN2UB OCR2UB TCR2UB 135
$21 ($41) WDTCR – – – WDTOE WDE WDP2 WDP1 WDP0 43
$20
(2)
($40)
(2)
UBRRH URSEL – – – UBRR[11:8] 171
UCSRC URSEL UMSEL UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL 170
$1F ($3F) EEARH – – – – – – EEAR9 EEAR8 20
$1E ($3E) EEARL EEPROM Address Register Low Byte 20
$1D ($3D) EEDR EEPROM Data Register 21
$1C ($3C) EECR – – – – EERIE EEMWE EEWE EERE 21
$1B ($3B) PORTA PORTA7 PORTA6 PORTA5 PORTA4 PORTA3 PORTA2 PORTA1 PORTA0 66
$1A ($3A) DDRA DDA7 DDA6 DDA5 DDA4 DDA3 DDA2 DDA1 DDA0 66
$19 ($39) PINA PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 66
$18 ($38) PORTB PORTB7 PORTB6 PORTB5 PORTB4 PORTB3 PORTB2 PORTB1 PORTB0 67
$17 ($37) DDRB DDB7 DDB6 DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 67
$16 ($36) PINB PINB7 PINB6 PINB5 PINB4 PINB3 PINB2 PINB1 PINB0 67
$15 ($35) PORTC PORTC7 PORTC6 PORTC5 PORTC4 PORTC3 PORTC2 PORTC1 PORTC0 67
$14 ($34) DDRC DDC7 DDC6 DDC5 DDC4 DDC3 DDC2 DDC1 DDC0 67
$13 ($33) PINC PINC7 PINC6 PINC5 PINC4 PINC3 PINC2 PINC1 PINC0 67
$12 ($32) PORTD PORTD7 PORTD6 PORTD5 PORTD4 PORTD3 PORTD2 PORTD1 PORTD0 67
$11 ($31) DDRD DDD7 DDD6 DDD5 DDD4 DDD3 DDD2 DDD1 DDD0 67
$10 ($30) PIND PIND7 PIND6 PIND5 PIND4 PIND3 PIND2 PIND1 PIND0 68
$0F ($2F) SPDR SPI Data Register 145
$0E ($2E) SPSR SPIF WCOL
– – – – – SPI2X 145
$0D ($2D) SPCR SPIE SPE DORD MSTR CPOL CPHA SPR1 SPR0 143
$0C ($2C) UDR USART I/O Data Register 167
$0B ($2B) UCSRA RXC TXC UDRE FE DOR PE U2X MPCM 168
$0A ($2A) UCSRB RXCIE TXCIE UDRIE RXEN TXEN UCSZ2 RXB8 TXB8 169
$09 ($29) UBRRL USART Baud Rate Register Low Byte 171
$08 ($28) ACSR ACD ACBG ACO ACI ACIE ACIC ACIS1 ACIS0 206
$07 ($27) ADMUX REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0 222
$06 ($26) ADCSRA ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 224
$05 ($25) ADCH ADC Data Register High Byte 225
$04 ($24) ADCL ADC Data Register Low Byte 225
$03 ($23) TWDR Two-wire Serial Interface Data Register 203
$02 ($22) TWAR TWA6 TWA5 TWA4 TWA3 TWA2 TWA1 TWA0 TWGCE 204
$01 ($21) TWSR TWS7
TWS6 TWS5 TWS4 TWS3
–
TWPS1 TWPS0
203
$00 ($20) TWBR Two-wire Serial Interface Bit Rate Register 201