Datasheet

78
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
14.3.4 Alternate functions of Port D
The Port D pins with alternate functions are shown in Table 14-12.
The alternate pin configuration is as follows:
• SEG – Port D, Bit 7:2
SEG, LCD front plane 19/15-24/20.
•INT0
/SEG – Port D, Bit 1
INT0, External Interrupt Source 0. The PD1 pin can serve as an external interrupt source to the MCU.
SEG, LCD front plane 25/21.
• ICP1/SEG – Port D, Bit 0
ICP1 – Input Capture pin1: The PD0 pin can act as an Input Capture pin for Timer/Counter1.
SEG, LCD front plane 26/22
Table 14-13 and Table 14-14 relates the alternate functions of Port D to the overriding signals shown in Figure 14-
5 on page 71.
Table 14-11. Overriding signals for alternate functions in PC3:PC0.
Signal name PC3/SEG(13/9) PC2/SEG(14/10) PC1/SEG(15/11) PC0/SEG(16/12)
PUOE LCDEN LCDEN LCDEN LCDEN
PUOV0000
DDOE LCDEN LCDEN LCDEN LCDEN
DDOV0000
PVOE0000
PVOV0000
PTOE––––
DIEOE LCDEN LCDEN LCDEN LCDEN
DIEOV0000
DI––––
AIO LCDSEG LCDSEG LCDSEG LCDSEG
Table 14-12. Port D pins alternate functions (SEG refers to 100-pin/64-pin pinout).
Port pin Alternate function
PD7 SEG (LCD front plane 19/15)
PD6 SEG (LCD front plane 20/16)
PD5 SEG (LCD front plane 21/17)
PD4 SEG (LCD front plane 22/18)
PD3 SEG (LCD front plane 23/19)
PD2 SEG (LCD front plane 24/20)
PD1 INT0
/SEG (External Interrupt0 Input or LCD front plane 25/21)
PD0 ICP1/SEG (Timer/Counter1 Input Capture pin or LCD front plane 26/22)