Datasheet

76
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
Table 14-7 and Table 14-8 relate the alternate functions of Port B to the overriding signals shown in Figure 14-5 on
page 71. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the MISO signal, while MOSI is divided into SPI
MSTR OUTPUT and SPI SLAVE INPUT.
Table 14-7. Overriding signals for alternate functions in PB7:PB4.
Signal name PB7/OC2A/PCINT15 PB6/OC1B/PCINT14 PB5/OC1A/PCINT13 PB4/OC0A/PCINT12
PUOE0000
PUOV0000
DDOE0000
DDOV0000
PVOE OC2A ENABLE OC1B ENABLE OC1A ENABLE OC0A ENABLE
PVOV OC2A OC1B OC1A OC0A
PTOE––––
DIEOE PCINT15 • PCIE1 PCINT14 • PCIE1 PCINT13 • PCIE1 PCINT12 • PCIE1
DIEOV1111
DI PCINT15 INPUT PCINT14 INPUT PCINT13 INPUT PCINT12 INPUT
AIO––––
Table 14-8. Overriding signals for alternate functions in PB3:PB0.
Signal name PB3/MISO/PCINT11 PB2/MOSI/PCINT10 PB1/SCK/PCINT9 PB0/SS/PCINT8
PUOE SPE • MSTR SPE • MSTR
SPE • MSTR SPE • MSTR
PUOV PORTB3 • PUD PORTB2 • PUD PORTB1 • PUD PORTB0 • PUD
DDOE SPE • MSTR SPE • MSTR SPE • MSTR SPE • MSTR
DDOV0000
PVOE SPE • MSTR
SPE • MSTR SPE • MSTR 0
PVOV SPI SLAVE OUTPUT SPI MSTR OUTPUT SCK OUTPUT 0
PTOE––––
DIEOE PCINT11 • PCIE1 PCINT10 • PCIE1 PCINT9 • PCIE1 PCINT8 • PCIE1
DIEOV1111
DI
PCINT11 INPUT
SPI MSTR INPUT
PCINT10 INPUT
SPI SLAVE INPUT
PCINT9 INPUT
SCK INPUT
PCINT8 INPUT
SPI SS
AIO––––