Datasheet

ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]

8284E–AVR–02/2013

14. I/O-ports

14.1 Overview

All AVR ports have true Read-Modify-Write functionality when used as general digital I/O ports. This means that

the direction of one port pin can be changed without unintentionally changing the direction of any other pin with the

SBI and CBI instructions. The same applies when changing drive value (if configured as output) or enabling/dis-

abling of pull-up resistors (if configured as input). Each output buffer has symmetrical drive characteristics with

both high sink and source capability. Port B has a higher pin driver strength than the other ports, but all the pin driv-

ers are strong enough to drive LED displays directly. All port pins have individually selectable pull-up resistors with

a supply-voltage invariant resistance. All I/O pins have protection diodes to both V

and Ground as indicated in

Figure 14-1. Refer to ”Electrical characteristics – TA = -40°C to 85°C” on page 325 for a complete list of parame-

ters. If exceeding the pin voltage “Absolute Maximum Ratings”, resulting currents can harm the device if not limited

accordingly. For segment pins used as general I/O, the same situation can also influence the LCD voltage level.

Figure 14-1. I/O pin equivalent schematic.

All registers and bit references in this section are written in general form. A lower case “x” represents the number-

ing letter for the port, and a lower case “n” represents the bit number. However, when using the register or bit

defines in a program, the precise form must be used. For example, PORTB3 for bit no. 3 in Port B, here docu-

mented generally as PORTxn. The physical I/O Registers and bit locations are listed in ”Register description” on

page 91.

Three I/O memory address locations are allocated for each port, one each for the Data Register – PORTx, Data

Direction Register – DDRx, and the Port Input Pins – PINx. The Port Input Pins I/O location is read only, while the

Data Register and the Data Direction Register are read/write. However, writing a logic one to a bit in the PINx Reg-

ister, will result in a toggle in the corresponding bit in the Data Register. In addition, the Pull-up Disable – PUD bit

in MCUCR disables the pull-up function for all pins in all ports when set.

Using the I/O port as General Digital I/O is described in ”Ports as general digital I/O” on page 66. Most port pins are

multiplexed with alternate functions for the peripheral features on the device. How each alternate function inter-

feres with the port pin is described in ”Alternate port functions” on page 71. Refer to the individual module sections

for a full description of the alternate functions.

Note that enabling the alternate function of some of the port pins does not affect the use of the other pins in the port

as general digital I/O.

Logic

See Figure

"General Digital I/O" for

Details

Pxn