Datasheet

50
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
11.3 Internal voltage reference
The Atmel ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P features an internal band-
gap reference. This reference is used for Brown-out Detection, and it can be used as an input to the Analog
Comparator or the ADC.
11.3.1 Voltage reference enable signals and start-up time
The voltage reference has a start-up time that may influence the way it should be used. The start-up time is given
in ”System and reset characteristics” on page 334. To save power, the reference is not always turned on. The ref-
erence is on during the following situations:
1. When the BOD is enabled (by programming the BODLEVEL [2:0] Fuse).
2. When the bandgap reference is connected to the Analog Comparator (by setting the ACBG bit in ACSR).
3. When the ADC is enabled.
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user must always allow
the reference to start up before the output from the Analog Comparator or ADC is used. To reduce power con-
sumption in Power-down mode, the user can avoid the three conditions above to ensure that the reference is
turned off before entering Power-down mode.
11.4 Watchdog Timer
The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at 1 MHz. This is the typical value at
V
CC
= 5V. See characterization data for typical values at other V
CC
levels. By controlling the Watchdog Timer pres-
caler, the Watchdog Reset interval can be adjusted as shown in Table 11-2 on page 53. The WDR – Watchdog
Reset – instruction resets the Watchdog Timer. The Watchdog Timer is also reset when it is disabled and when a
Chip Reset occurs. Eight different clock cycle periods can be selected to determine the reset period. If the reset
period expires without another Watchdog Reset, the
ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P resets and executes from the Reset
Vector. For timing details on the Watchdog Reset, refer to Table 11-2 on page 53.
To prevent unintentional disabling of the Watchdog or unintentional change of time-out period, two different safety
levels are selected by the fuse WDTON as shown in Table 11-1. Refer to ”Timed sequences for changing the con-
figuration of the Watchdog Timer” on page 51 for details.
Table 11-1. WDT configuration as a function of the fuse settings of WDTON.
WDTON
Safety
level
WDT initial
state
How to disable the
WDT
How to change time-
out
Unprogrammed 1 Disabled Timed sequence Timed sequence
Programmed 2 Enabled Always enabled Timed sequence