Datasheet

41
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
10.7 Power-save mode
When the SM2:0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-save mode. This
mode is identical to Power-down, with one exception:
If Timer/Counter2 and/or the LCD controller are enabled, they will keep running during sleep. The device can wake
up from either Timer Overflow or Output Compare event from Timer/Counter2 if the corresponding Timer/Counter2
interrupt enable bits are set in TIMSK2, and the Global Interrupt Enable bit in SREG is set. It can also wake up from
an LCD controller interrupt.
If neither Timer/Counter2 nor the LCD controller is running, Power-down mode is recommended instead of Power-
save mode.
The LCD controller and Timer/Counter2 can be clocked both synchronously and asynchronously in Power-save
mode. The clock source for the two modules can be selected independent of each other. If neither the LCD control-
ler nor the Timer/Counter2 is using the asynchronous clock, the Timer/Counter Oscillator is stopped during sleep.
If neither the LCD controller nor the Timer/Counter2 is using the synchronous clock, the clock source is stopped
during sleep. Note that even if the synchronous clock is running in Power-save, this clock is only available for the
LCD controller and Timer/Counter2.
10.8 Standby mode
When the SM2:0 bits are 110 and an external XTAL/resonator clock option is selected, the SLEEP instruction
makes the MCU enter Standby mode. This mode is identical to Power-down with the exception that the Oscillator is
kept running. From Standby mode, the device wakes up in six clock cycles.
10.9 Power Reduction Register
The Power Reduction Register (PRR), see ”PRR – Power Reduction Register” on page 45, provides a method to
stop the clock to individual peripherals to reduce power consumption. The current state of the peripheral is frozen
and the I/O registers can not be read or written. Resources used by the peripheral when stopping the clock will
remain occupied, hence the peripheral should in most cases be disabled before stopping the clock. Waking up a
module, which is done by clearing the bit in PRR, puts the module in the same state as before shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall power consump-
tion. See ”ATmega169A: Supply current of I/O modules” on page 349 for examples. In all other sleep modes, the
clock is already stopped.