Datasheet

38
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
up. This feature should be used if the selected clock source has a higher frequency than the maximum frequency
of the device at the present operating conditions. Note that any value can be written to the CLKPS bits regardless
of the CKDIV8 Fuse setting. The Application software must ensure that a sufficient division factor is chosen if the
selected clock source has a higher frequency than the maximum frequency of the device at the present operating
conditions. The device is shipped with the CKDIV8 Fuse programmed.
Table 9-14. Clock prescaler select.
CLKPS3 CLKPS2 CLKPS1 CLKPS0 Clock division factor
0000 1
0001 2
0010 4
0011 8
0100 16
0101 32
0110 64
0111 128
1000 256
1001 Reserved
1010 Reserved
1011 Reserved
1100 Reserved
1101 Reserved
1110 Reserved
1111 Reserved