Datasheet

196
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
ldi r16,(1<<USIWM0)|(0<<USICS0)|(1<<USITC)
ldi r17,(1<<USIWM0)|(0<<USICS0)|(1<<USITC)|(1<<USICLK)
sts USICR,r16 ; MSB
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16 ; LSB
sts USICR,r17
lds r16,USIDR
ret
21.3.3 SPI Slave Operation Example
The following code demonstrates how to use the USI module as a SPI Slave:
init:
ldi r16,(1<<USIWM0)|(1<<USICS1)
sts USICR,r16
...
SlaveSPITransfer:
sts USIDR,r16
ldi r16,(1<<USIOIF)
sts USISR,r16
SlaveSPITransfer_loop:
lds r16, USISR
sbrs r16, USIOIF
rjmp SlaveSPITransfer_loop
lds r16,USIDR
ret
The code is size optimized using only eight instructions (+ ret). The code example assumes that the DO is config-
ured as output and USCK pin is configured as input in the DDR Register. The value stored in register r16 prior to
the function is called is transferred to the master device, and when the transfer is completed the data received from
the Master is stored back into the r16 Register.
Note that the first two instructions is for initialization only and needs only to be executed once.These instructions
sets Three-wire mode and positive edge Shift Register clock. The loop is repeated until the USI Counter Overflow
Flag is set.