Datasheet

157
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
18.10.7 GTCCR – General Timer/Counter Control Register
• Bit 1 – PSR2: Prescaler Reset Timer/Counter2
When this bit is one, the Timer/Counter2 prescaler will be reset. This bit is normally cleared immediately by hard-
ware. If the bit is written when Timer/Counter2 is operating in asynchronous mode, the bit will remain one until the
prescaler has been reset. The bit will not be cleared by hardware if the TSM bit is set. Refer to the description of
the ”Bit 7 – TSM: Timer/Counter Synchronization Mode” on page 140 for a description of the Timer/Counter Syn-
chronization mode.
Bit 7 6 5 4 3 2 1 0
0x23 (0x43)
TSM – – – – –PSR2PSR10 GTCCR
Read/Write R/W R R R R R R/W R/W
Initial Value 0 0 0 0 0 0 0 0