Datasheet

138
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
Table 17-3 shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast PWM mode.
Note: 1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the compare match is ignored,
but the set or clear is done at BOTTOM. See ”Fast PWM Mode” on page 121 for more details.
Table 17-4 shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to phase correct PWM mode.
Note: 1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the compare match is ignored,
but the set or clear is done at TOP. See ”Phase Correct PWM Mode” on page 123 for more details.
Table 17-2. Compare Output mode, non-PWM mode.
COM0A1 COM0A0 Description
0 0 Normal port operation, OC0A disconnected.
0 1 Toggle OC0A on compare match
1 0 Clear OC0A on compare match
1 1 Set OC0A on compare match
Table 17-3. Compare Output mode, fast PWM mode
(1)
.
COM0A1 COM0A0 Description
0 0 Normal port operation, OC0A disconnected.
01Reserved
10
Clear OC0A on compare match, set OC0A at BOTTOM
(non-inverting mode)
11
Set OC0A on compare match, clear OC0A at BOTTOM
(inverting mode)
Table 17-4. Compare Output mode, phase correct PWM mode
(1)
.
COM0A1 COM0A0 Description
0 0 Normal port operation, OC0A disconnected.
01Reserved
10
Clear OC0A on compare match when up-counting. Set OC0A on
compare match when counting down.
11
Set OC0A on compare match when up-counting. Clear OC0A on
compare match when counting down.