Datasheet
96
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
event will also set the Compare Flag (OCF0A) which can be used to generate an Output Compare interrupt
request.
15.2.2 Definitions
Many register and bit references in this section are written in general form. A lower case “n” replaces the
Timer/Counter number, in this case 0. A lower case “x” replaces the Output Compare unit number, in this case unit
A. However, when using the register or bit defines in a program, the precise form must be used, i.e., TCNT0 for
accessing Timer/Counter0 counter value and so on.
The definitions in Table 15-1 are also used extensively throughout the document.
15.3 Timer/Counter Clock Sources
The Timer/Counter can be clocked by an internal or an external clock source. The clock source is selected by the
Clock Select logic which is controlled by the Clock Select (CS02:0) bits located in the Timer/Counter Control Reg-
ister (TCCR0A). For details on clock sources and prescaler, see ”Timer/Counter Timing Diagrams” on page 104
and onwards.
15.4 Counter Unit
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit. Figure 15-2 shows a
block diagram of the counter and its surroundings.
Figure 15-2. Counter Unit block diagram.
Signal description (internal signals):
count Increment or decrement TCNT0 by 1.
direction Select between increment and decrement.
clear Clear TCNT0 (set all bits to zero).
clk
Tn
Timer/Counter clock, referred to as clk
T0
in the following.
top Signalize that TCNT0 has reached maximum value.
bottom Signalize that TCNT0 has reached minimum value (zero).
Table 15-1. Definitions of Timer/Counter values.
BOTTOM The counter reaches the BOTTOM when it becomes 0x00.
MAX The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
TOP The counter reaches the TOP when it becomes equal to the highest value in the
count sequence. The TOP value can be assigned to be the fixed value 0xFF
(MAX) or the value stored in the OCR0A Register. The assignment is depen-
dent on the mode of operation.
DATA BU S
TCNTn Control Logic
count
TOVn
(Int.Req.)
Clock Select
top
Tn
Edge
Detector
( From Prescaler )
clk
Tn
bottom
direction
clear