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ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller TQFP 64 (14x14) 8-Bit 20 MHz I/O number 54
51525354555657585960
60
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
13. External interrupts
13.1 Overview
The External Interrupts are triggered by the INT0 pin or any of the PCINT30:0 pins
(2)
. Observe that, if enabled, the
interrupts will trigger even if the INT0 or PCINT30:0 pins are configured as outputs. This feature provides a way of
generating a software interrupt. The pin change interrupt PCI1 will trigger if any enabled PCINT15:8 pin toggles.
Pin change interrupts PCI0 will trigger if any enabled PCINT7:0 pin toggles. The PCMSK3
(1)
, PCMSK2
(1)
,
PCMSK1, and PCMSK0 Registers control which pins contribute to the pin change interrupts. Pin change interrupts
on PCINT30:0 are detected asynchronously. This implies that these interrupts can be used for waking the part also
from sleep modes other than Idle mode.
The INT0 interrupts can be triggered by a falling or rising edge or a low level. This is set up as indicated in the
specification for the ”EICRA – External Interrupt Control Register A” on page 61. When the INT0 interrupt is
enabled and is configured as level triggered, the interrupt will trigger as long as the pin is held low. Note that recog-
nition of falling or rising edge interrupts on INT0 requires the presence of an I/O clock, described in ”Clock systems
and their distribution” on page 29. Low level interrupt on INT0 is detected asynchronously. This implies that this
interrupt can be used for waking the part also from sleep modes other than Idle mode. The I/O clock is halted in all
sleep modes except Idle mode.
Note that if a level triggered interrupt is used for wake-up from Power-down, the required level must be held long
enough for the MCU to complete the wake-up to trigger the level interrupt. If the level disappears before the end of
the Start-up Time, the MCU will still wake up, but no interrupt will be generated. The start-up time is defined by the
SUT and CKSEL Fuses as described in ”System clock and clock options” on page 29.
Notes: 1. PCMSK3 and PCMSK2 are only present in the Atmel ATmega3290A/3290PA/6490A/6490P.
2. PCINT30:16 are only present in the ATmega3290A/3290PA/6490A/6490P. Only PCINT15:0 are present in the
Atmel ATmega169A/169PA, ATmega329A/329PA and ATmega649A/649P. See ”Pin configurations” on page 2 and
”Register description” on page 61 for details.