Datasheet

46
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
11. System control and reset
11.1 Resetting the AVR
During reset, all I/O Registers are set to their initial values, and the program starts execution from the Reset Vec-
tor. The instruction placed at the Reset Vector must be a JMP – Absolute Jump – instruction to the reset handling
routine. If the program never enables an interrupt source, the Interrupt Vectors are not used, and regular program
code can be placed at these locations. This is also the case if the Reset Vector is in the Application section while
the Interrupt Vectors are in the Boot section or vice versa. The circuit diagram in ”Reset logic.” on page 47 shows
the reset logic. ”System and reset characteristics” on page 334 defines the electrical parameters of the reset
circuitry.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes active. This does not
require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal reset. This allows the
power to reach a stable level before normal operation starts. The time-out period of the delay counter is defined by
the user through the SUT and CKSEL Fuses. The different selections for the delay period are presented in ”Clock
sources” on page 30.
11.2 Reset sources
The Atmel ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P has five sources of reset:
• Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset threshold (V
POT
)
• External Reset. The MCU is reset when a low level is present on the RESET
pin for longer than the minimum
pulse length
• Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the Watchdog is enabled
• Brown-out Reset. The MCU is reset when the supply voltage V
CC
is below the Brown-out Reset threshold (V
BOT
)
and the Brown-out Detector is enabled
• JTAG AVR Reset. The MCU is reset as long as there is a logic one in the Reset Register, one of the scan chains
of the JTAG system. Refer to the section ”IEEE 1149.1 (JTAG) Boundary-scan” on page 245 for details