Datasheet

298
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
28.7 Parallel programming
28.7.1 Enter programming mode
The following algorithm puts the device in parallel programming mode:
PAGEL PD7 I Program Memory and EEPROM data Page Load.
BS2 PA0 I
Byte Select 2 (“0” selects low byte, “1” selects 2’nd high
byte).
DATA PB7-0 I/O Bi-directional Data bus (Output when OE
is low).
Table 28-10. Pin values used to enter programming mode.
Pin Symbol Value
PAGEL Prog_enable[3] 0
XA1 Prog_enable[2] 0
XA0 Prog_enable[1] 0
BS1 Prog_enable[0] 0
Table 28-11. XA1 and XA0 coding.
XA1 XA0 Action when XTAL1 is pulsed
0 0 Load Flash or EEPROM Address (High or low address byte determined by
BS1).
0 1 Load Data (High or Low data byte for Flash determined by BS1).
1 0 Load Command
1 1 No Action, Idle
Table 28-12. Command Byte bit coding.
Command byte Command executed
1000 0000 Chip Erase
0100 0000 Write Fuse bits
0010 0000 Write Lock bits
0001 0000 Write Flash
0001 0001 Write EEPROM
0000 1000 Read Signature Bytes and Calibration byte
0000 0100 Read Fuse and Lock bits
0000 0010 Read Flash
0000 0011 Read EEPROM
Table 28-9. Pin name mapping. (Continued)
Signal name in
programming mode Pin name I/O Function