Datasheet
20
ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET]
8284E–AVR–02/2013
8. AVR memories
This section describes the different memories in the Atmel
ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P. The Atmel AVR architecture has two
main memory spaces, the Data Memory and the Program Memory space. In addition, the
ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P features an EEPROM Memory for
data storage. All three memory spaces are linear.
8.1 In-system reprogrammable flash program memory
The ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P contains 16/32/64K bytes On-
chip In-System Reprogrammable Flash memory for program storage. Since all AVR instructions are 16 or 32 bits
wide, the Flash is organized as 8K × 16 (ATmega169A/169PA) and 16/32K × 16
(ATmega329A/ATmega329PA/ATmega3290A/ATmega3290PA/ATmega649A/ATmega649P/ATmega6490A/ATm
ega6490P). For software security, the Flash Program memory space is divided into two sections, Boot Program
section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles.
The ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P Program Counter (PC) is
13/14/15 bits wide, thus addressing the 8/16/32K program memory locations. The operation of Boot Program sec-
tion and associated Boot Lock bits for software protection are described in detail in ”Boot Loader Support – Read-
While-Write Self-Programming” on page 278. ”Memory programming” on page 293 contains a detailed description
on Flash data serial downloading using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM – Load Program
Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in ”Instruction execution timing” on page 16.
Figure 8-1. Program memory map.
8.2 SRAM data memory
Figure 8-2 shows how the SRAM memory is organized.
The ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P is a complex microcontroller with
more peripheral units than can be supported within the 64 locations reserved in the Opcode for the IN and OUT
0x0000
0x1FFF/0x3FFF/0x7FFF
Program Memory
Application Flash Section
Boot Flash Section