Datasheet

314
8284D–AVR–6/11
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
28.6 Parallel Programming Parameters, Pin Mapping, and Commands
This section describes how to parallel program and verify Flash Program memory, EEPROM
Data memory, Memory Lock bits, and Fuse bits in the
ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P. Pulses are
assumed to be at least 250ns unless otherwise noted.
28.6.1 Signal Names
In this section, some pins of the
ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P are referenced by
signal names describing their functionality during parallel programming, see Figure 28-1 on
page 314 and Table 28-9 on page 315. Pins not described in the following table are referenced
by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in Table 28-11 on page 315.
When pulsing WR
or OE, the command loaded determines the action executed. The different
Commands are shown in Table 28-12 on page 315.
Figure 28-1. Parallel Programming
Table 28-8. No. of Words in a Page and No. of Pages in the EEPROM
EEPROM Size Page Size PCWORD No. of Pages PCPAGE EEAMSB
1Kbytes 4 bytes EEA[1:0] 256 EEA[13:2] 13
VCC
+5V
GND
XTAL1
PD1
PD2
PD3
PD4
PD5
PD6
PB7 - PB0 DATA
RESET
PD7
+12 V
BS1
XA0
XA1
OE
RDY/BSY
PAGEL
PA0
WR
BS2
AVCC
+5V