Datasheet

203
8284D–AVR–6/11
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
20.11.5 UBRRnL and UBRRnH – USART Baud Rate Registers n
• Bit 15:12 – Reserved
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRnH is written.
• Bit 11:0 – UBRR[11:0]: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRnH contains the four
most significant bits, and the UBRRnL contains the eight least significant bits of the USART
baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud
rate is changed. Writing UBRRnL will trigger an immediate update of the baud rate prescaler.
Figure 20-12. UCPOLn Bit Settings
UCPOLn
Transmitted Data Changed (Output
of TxD Pin)
Received Data Sampled (Input
on RxD Pin)
0 Rising XCK Edge Falling XCK Edge
1 Falling XCK Edge Rising XCK Edge
Bit 151413121110 9 8
– – – – UBRRn[11:8] UBRRnH
UBRRn[7:0] UBRRnL
76543210
Read/WriteRRRRR/WR/WR/WR/W
R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
00000000