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ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller TQFP 100 (14x14) 8-Bit 20 MHz I/O number 69
51525354555657585960
58
8021G–AVR–03/11
ATmega329P/3290P
12. External Interrupts
12.1 Overview
The External Interrupts are triggered by the INT0 pin or any of the PCINT30:0 pins
(2)
. Observe
that, if enabled, the interrupts will trigger even if the INT0 or PCINT30:0 pins are configured as
outputs. This feature provides a way of generating a software interrupt. The pin change interrupt
PCI1 will trigger if any enabled PCINT15:8 pin toggles. Pin change interrupts PCI0 will trigger if
any enabled PCINT7:0 pin toggles. The PCMSK3
(1)
, PCMSK2
(1)
, PCMSK1, and PCMSK0 Reg-
isters control which pins contribute to the pin change interrupts. Pin change interrupts on
PCINT30:0 are detected asynchronously. This implies that these interrupts can be used for wak-
ing the part also from sleep modes other than Idle mode.
The INT0 interrupts can be triggered by a falling or rising edge or a low level. This is set up as
indicated in the specification for the ”EICRA – External Interrupt Control Register A” on page 59.
When the INT0 interrupt is enabled and is configured as level triggered, the interrupt will trigger
as long as the pin is held low. Note that recognition of falling or rising edge interrupts on INT0
requires the presence of an I/O clock, described in ”Clock Systems and their Distribution” on
page 27. Low level interrupt on INT0 is detected asynchronously. This implies that this interrupt
can be used for waking the part also from sleep modes other than Idle mode. The I/O clock is
halted in all sleep modes except Idle mode.
Note that if a level triggered interrupt is used for wake-up from Power-down, the required level
must be held long enough for the MCU to complete the wake-up to trigger the level interrupt. If
the level disappears before the end of the Start-up Time, the MCU will still wake up, but no inter-
rupt will be generated. The start-up time is defined by the SUT and CKSEL Fuses as described
in ”System Clock and Clock Options” on page 27.
Notes: 1. PCMSK3 and PCMSK2 are only present in ATmega3290P.
2. PCINT30:16 are only present in ATmega3290P. Only PCINT15:0 are present in ATmega329P.
See ”Pin Configurations” on page 2 and ”Register Description” on page 59 for details.