Datasheet

56
8021G–AVR–03/11
ATmega329P/3290P
0x3804/0x7804 jmp PCINT0 ; PCINT0 Handler
... ... ... ;
0x382C/0x782C jmp SPM_RDY ; Store Program Memory Ready Handler
;
0x382E/0x782ERESET:ldir16,high(RAMEND); Main program start
0x382F/0x782F out SPH,r16 ; Set Stack Pointer to top of RAM
0x3830/0x7830 ldi r16,low(RAMEND)
0x3831/0x7831 out SPL,r16
0x3832/0x7832 sei ; Enable interrupts
0x3833/0x7833 <instr> xxx
11.2.1 Moving Interrupts Between Application and Boot Space
The General Interrupt Control Register controls the placement of the Interrupt Vector table. See
”MCUCR – MCU Control Register” on page 57.
To avoid unintentional changes of Interrupt Vector tables, a special write procedure must be fol-
lowed to change the IVSEL bit:
1. Write the Interrupt Vector Change Enable (IVCE) bit to one.
2. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled
in the cycle IVCE is set, and they remain disabled until after the instruction following the write to
IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status
Register is unaffected by the automatic disabling.
Note: If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed,
interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed
in the Application section and Boot Lock bit BLB12 is programed, interrupts are disabled while
executing from the Boot Loader section. Refer to the section ”Boot Loader Support – Read-While-
Write Self-Programming” on page 281 for details on Boot Lock bits.
The following example shows how interrupts are moved.