Datasheet
v
8021G–AVR–03/11
ATmega329P/3290P
22.5Prescaling and Conversion Timing ......................................................................216
22.6Changing Channel or Reference Selection .........................................................218
22.7ADC Noise Canceler ...........................................................................................219
22.8ADC Conversion Result ......................................................................................223
22.9Register Description ............................................................................................225
23 LCD Controller ..................................................................................... 230
23.1Features ..............................................................................................................230
23.2Overview .............................................................................................................230
23.3Mode of Operation ...............................................................................................233
23.4LCD Usage ..........................................................................................................237
23.5Register Description ............................................................................................241
24 JTAG Interface and On-chip Debug System ..................................... 248
24.1Features ..............................................................................................................248
24.2Overview .............................................................................................................248
24.3TAP – Test Access Port ......................................................................................248
24.4TAP Controller .....................................................................................................250
24.5Using the Boundary-scan Chain ..........................................................................251
24.6Using the On-chip Debug System .......................................................................251
24.7On-chip Debug Specific JTAG Instructions .........................................................252
24.8Using the JTAG Programming Capabilities .........................................................252
24.9Bibliography .........................................................................................................253
24.10Register Description ..........................................................................................253
25 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 254
25.1Features ..............................................................................................................254
25.2Overview .............................................................................................................254
25.3Data Registers .....................................................................................................255
25.4Boundary-scan Specific JTAG Instructions .........................................................256
25.5Boundary-scan Chain ..........................................................................................257
25.6ATmega329P/3290P Boundary-scan Order ........................................................266
25.7Boundary-scan Description Language Files ........................................................279
25.8Register Description ............................................................................................280
26 Boot Loader Support – Read-While-Write Self-Programming ......... 281
26.1Features ..............................................................................................................281
26.2Overview .............................................................................................................281
26.3Application and Boot Loader Flash Sections .......................................................281