Data Sheet

91
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
• RXD/PCINT16 – Port D, Bit 0
RXD, Receive Data (Data input pin for the USART). When the USART Receiver is enabled this pin is configured
as an input regardless of the value of DDD0. When the USART forces this pin to be an input, the pull-up can still
be controlled by the PORTD0 bit.
PCINT16: Pin Change Interrupt source 16. The PD0 pin can serve as an external interrupt source.
Table 14-10 and Table 14-11 relate the alternate functions of Port D to the overriding signals shown in Figure
14-5 on page 81.
Table 14-10. Overriding Signals for Alternate Functions PD7...PD4
Signal
Name
PD7/AIN1
/PCINT23
PD6/AIN0/
OC0A/PCINT22
PD5/T1/OC0B/
PCINT21
PD4/XCK/
T0/PCINT20
PUOE0000
PUO 0 0 0 0
DDOE 0 0 0 0
DDOV 0 0 0 0
PVOE 0 OC0A ENABLE OC0B ENABLE UMSEL
PVOV 0 OC0A OC0B XCK OUTPUT
DIEOE PCINT23 • PCIE2 PCINT22 • PCIE2 PCINT21 • PCIE2 PCINT20 • PCIE2
DIEOV 1 1 1 1
DI PCINT23 INPUT PCINT22 INPUT
PCINT21 INPUT
T1 INPUT
PCINT20 INPUT
XCK INPUT
T0 INPUT
AIO AIN1 INPUT AIN0 INPUT – –
Table 14-11. Overriding Signals for Alternate Functions in PD3...PD0
Signal
Name
PD3/OC2B/INT1/
PCINT19
PD2/INT0/
PCINT18
PD1/TXD/
PCINT17
PD0/RXD/
PCINT16
PUOE 0 0 TXEN RXEN
PUO000PORTD0 • PUD
DDOE 0 0 TXEN RXEN
DDOV0010
PVOE OC2B ENABLE 0 TXEN 0
PVOV OC2B 0 TXD 0
DIEOE
INT1 ENABLE +
PCINT19 • PCIE2
INT0 ENABLE +
PCINT18 • PCIE1
PCINT17 • PCIE2 PCINT16 • PCIE2
DIEOV1111
DI
PCINT19 INPUT
INT1 INPUT
PCINT18 INPUT
INT0 INPUT
PCINT17 INPUT
PCINT16 INPUT
RXD
AIO––––