Data Sheet

234
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
The LSB of TWAR is used to enable recognition of the general call address (0x00). There is an associated
address comparator that looks for the slave address (or general call address if enabled) in the received serial
address. If a match is found, an interrupt request is generated.
• Bits 7:1 – TWA: TWI (Slave) Address Register
These seven bits constitute the slave address of the TWI unit.
• Bit 0 – TWGCE: TWI General Call Recognition Enable Bit
If set, this bit enables the recognition of a General Call given over the 2-wire Serial Bus.
22.9.6 TWAMR – TWI (Slave) Address Mask Register
• Bits 7:1 – TWAM: TWI Address Mask
The TWAMR can be loaded with a 7-bit Salve Address mask. Each of the bits in TWAMR can mask (disable)
the corresponding address bits in the TWI Address Register (TWAR). If the mask bit is set to one then the
address match logic ignores the compare between the incoming address bit and the corresponding bit in TWAR.
Figure 22-22 shown the address match logic in detail.
Figure 22-22. TWI Address Match Logic, Block Diagram
• Bit 0 – Reserved
This bit is an unused bit in the ATmega48A/PA/88A/PA/168A/PA/328/P, and will always read as zero.
Bit 76543210
(0xBD)
TWAM[6:0] – TWAMR
Read/Write R/W R/W R/W R/W R/W R/W R/W R
Initial Value 0 0 0 0 0 0 0 0
Addre
ss
Match
Address Bit Comparator 0
Address Bit Comparator 6..1
TWAR0
TWAMR0
Address
Bit 0