Datasheet

47
7810C–AVR–10/12
Atmel ATmega328P [Preliminary]
10.4 External Reset
An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see “System and Reset Characteristics” on page 308) will generate a
reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset.
When the applied signal reaches the Reset Threshold Voltage – V
RST
– on its positive edge, the
delay counter starts the MCU after the Time-out period – t
TOUT
– has expired. The External Reset
can be disabled by the RSTDISBL fuse, see Table 27-7 on page 289.
Figure 10-4. External Reset During Operation
10.5 Brown-out Detection
ATmega328P has an On-chip Brown-out Detection (BOD) circuit for monitoring the V
CC
level
during operation by comparing it to a fixed trigger level. The trigger level for the BOD can be
selected by the BODLEVEL Fuses. The trigger level has a hysteresis to ensure spike free
Brown-out Detection. The hysteresis on the detection level should be interpreted as V
BOT+
=
V
BOT
+ V
HYST
/2 and V
BOT-
= V
BOT
- V
HYST
/2.When the BOD is enabled, and V
CC
decreases to a
value below the trigger level (V
BOT-
in Figure 10-5 on page 47), the Brown-out Reset is immedi-
ately activated. When V
CC
increases above the trigger level (V
BOT+
in Figure 10-5 on page 47),
the delay counter starts the MCU after the Time-out period t
TOUT
has expired.
The BOD circuit will only detect a drop in V
CC
if the voltage stays below the trigger level for lon-
ger than t
BOD
given in “System and Reset Characteristics” on page 308.
Figure 10-5. Brown-out Reset During Operation
CC
V
CC
RESET
TIME-OUT
INTERNAL
RESET
V
BOT-
V
BOT+
t
TOUT