Datasheet

32
2570N–AVR–05/11
ATmega325/3250/645/6450
Applying an external clock source to TOSC1 can be done if EXTCLK in the ASSR Register is
written to logic one. See “Asynchronous Operation of Timer/Counter2” on page 141 for further
description on selecting external clock as input instead of a 32kHz crystal.
9.9 System Clock Prescaler
The Atmel ATmega325/3250/645/6450 system clock can be divided by setting the “CLKPR –
Clock Prescale Register” on page 33. This feature can be used to decrease power consumption
when the requirement for processing power is low. This can be used with all clock source
options, and it will affect the clock frequency of the CPU and all synchronous peripherals. clk
I/O
,
clk
ADC
, clk
CPU
, and clk
FLASH
are divided by a factor as shown in Table 9-11 on page 33.
9.9.1 Switching Time
When switching between prescaler settings, the System Clock Prescaler ensures that no
glitches occur in the clock system and that no intermediate frequency is higher than neither the
clock frequency corresponding to the previous setting, nor the clock frequency corresponding to
the new setting.
The ripple counter that implements the prescaler runs at the frequency of the undivided clock,
which may be faster than the CPU’s clock frequency. Hence, it is not possible to determine the
state of the prescaler – even if it were readable, and the exact time it takes to switch from one
clock division to another cannot be exactly predicted.
From the time the CLKPS values are written, it takes between T1 + T2 and T1 + 2*T2 before the
new clock frequency is active. In this interval, 2 active clock edges are produced. Here, T1 is the
previous clock period, and T2 is the period corresponding to the new prescaler setting.
9.10 Register Description
9.10.1 OSCCAL – Oscillator Calibration Register
• Bits 7:0 – CAL7:0: Oscillator Calibration Value
The Oscillator Calibration Register is used to trim the Calibrated Internal RC Oscillator to
remove process variations from the oscillator frequency. A pre-programmed calibration value is
automatically written to this register during chip reset, giving the Factory calibrated frequency as
specified in Table 28-2 on page 300. The application software can write this register to change
the oscillator frequency. The oscillator can be calibrated to frequencies as specified in Table 28-
2 on page 300. Calibration outside that range is not guaranteed.
Note that this oscillator is used to time EEPROM and Flash write accesses, and these write
times will be affected accordingly. If the EEPROM or Flash are written, do not calibrate to more
than 8.8MHz. Otherwise, the EEPROM or Flash write may fail.
The CAL7 bit determines the range of operation for the oscillator. Setting this bit to 0 gives the
lowest frequency range, setting this bit to 1 gives the highest frequency range. The two fre-
quency ranges are overlapping, in other words a setting of OSCCAL = 0x7F gives a higher
frequency than OSCCAL = 0x80.
Bit 76543210
(0x66) CAL7 CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 OSCCAL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value Device Specific Calibration Value