Datasheet

v
8023F–AVR–07/09
ATmega325P/3250P
21.4Starting a Conversion ..........................................................................................208
21.5Prescaling and Conversion Timing ......................................................................209
21.6Changing Channel or Reference Selection .........................................................211
21.7ADC Noise Canceler ...........................................................................................212
21.8ADC Conversion Result ......................................................................................216
21.9Register Description ............................................................................................218
22 JTAG Interface and On-chip Debug System ..................................... 223
22.1Features ..............................................................................................................223
22.2Overview .............................................................................................................223
22.3TAP – Test Access Port ......................................................................................223
22.4TAP Controller .....................................................................................................225
22.5Using the Boundary-scan Chain ..........................................................................226
22.6Using the On-chip Debug System .......................................................................226
22.7On-chip Debug Specific JTAG Instructions .........................................................227
22.8Using the JTAG Programming Capabilities .........................................................227
22.9Bibliography .........................................................................................................228
22.10Register Description ..........................................................................................228
23 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 229
23.1Features ..............................................................................................................229
23.2Overview .............................................................................................................229
23.3Data Registers .....................................................................................................229
23.4Boundary-scan Specific JTAG Instructions .........................................................231
23.5Boundary-scan Chain ..........................................................................................232
23.6ATmega325P/3250P Boundary-scan Order ........................................................241
23.7Boundary-scan Description Language Files ........................................................254
23.8Register Description ............................................................................................255
24 Boot Loader Support – Read-While-Write Self-Programming ......... 256
24.1Features ..............................................................................................................256
24.2Overview .............................................................................................................256
24.3Application and Boot Loader Flash Sections .......................................................256
24.4Read-While-Write and No Read-While-Write Flash Sections ..............................257
24.5Boot Loader Lock Bits .........................................................................................259
24.6Entering the Boot Loader Program ......................................................................261
24.7Addressing the Flash During Self-Programming .................................................261
24.8Self-Programming the Flash ................................................................................262