Datasheet
576
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
35.4 Rev. 8272B - 05/11
35.5 Rev. 8272A - 01/10
1. Added Atmel QTouch Library Support and QTouch Sensing Capability Features.
2. Replaced the Figure 1-1 on page 2 by an updated “Pinout.” that includes Timer/Counter3.
3. Replaced the Figure 7-1 on page 10 by an updated “Block diagram of the AVR architecture.” that
includes Timer/Counter3.
4. Added ”RAMPZ – Extended Z-pointer Register for ELPM/SPM(1)” on page 15.
5. Added ”PRR1 – Power Reduction Register 1” on page 49.
6. Renamed PRR to ”PRR0 – Power Reduction Register 0” on page 48.
7. Updated ”PCIFR – Pin Change Interrupt Flag Register” on page 69. PCICR replaces EIMSR in
the PCIF3, PCIF2, PCIF1 and PCIF0 bit description.
8. Updated ”PCMSK3 – Pin Change Mask Register 3” on page 70. PCIE3 replaces PCIE2 in the bit
description.
9. Updated ”Alternate Functions of Port B” on page 82 to include Timer/Counter3
10. Updated ”Alternate Functions of Port D” on page 88 to include Timer/Counter3
11. Added ”TCNT3H and TCNT3L –Timer/Counter3” on page 137
12. Added ”OCR3AH and OCR3AL – Output Compare Register3 A” on page 138
13. Added ”OCR3BH and OCR3BL – Output Compare Register3 B” on page 138
14. Added ”TIMSK3 – Timer/Counter3 Interrupt Mask Register” on page 140
15. Updated All “SPI – Serial Peripheral Interface” “Register description” to reflect ATmega1284 and
ATmega1284P.
16. Updated ”Addressing the Flash During Self-Programming” on page 285 to include RAMPZ
register.
17. Updated Table 27-16 on page 315. t
WD_EEPROM
is 3.6ms instead of 9ms.
18. BODS and BODSE bits denoted as R/W
19. Description of external pin modes below table 16-9 removed.
20. Updated ”Register summary” on page 554 to include Timer/Counter3.
21. Updated the datasheet with Atmel new style guide.
1. Initial revision (Based on the ATmega164PA/324PA/644PA/1284P datasheet 8252G-AVR-11/09
and on the ATmega644 datasheet 2593N-AVR-09/09).
2. Changes done:
– Non-picoPower devices added: ATmega164A/324A/644A/1284
– Updated Table 2-1 on page 7
– Updated Table 10-1 on page 42
– Updated ”Sleep Modes” on page 42 and ”BOD disable(1)” on page 43
– Updated ”Register description” on page 67
– Updated ”USART” on page 175 and ”USART in SPI mode” on page 202