240
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
Figure 21-22. TWI address match logic, block diagram.
• Bit 0 – Reserved
This bit is reserved and will always read as zero.
Address
Match
Address Bit Comparator 0
Address Bit Comparator 6..1
TWAR0
TWAMR0
Address
Bit 0
