Datasheet

24
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
8.6 Register Description
8.6.1 EEARH and EEARL – The EEPROM Address Register
• Bits 15:12 – Reserved
These bits are reserved bits in the Atmel
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P and will always read as zero.
• Bits 11:0 – EEAR8:0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
512/1K/2K/4Kbytes EEPROM space. The EEPROM data bytes are addressed linearly between
0 and 511/1023/2047/4096. The initial value of EEAR is undefined. A proper value must be writ-
ten before the EEPROM may be accessed.
8.6.2 EEDR – The EEPROM Data Register
• Bits 7:0 – EEDR7:0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
8.6.3 EECR – The EEPROM Control Register
• Bits 7:6 – Reserved
These bits are reserved bits in the ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P
and will always read as zero.
• Bits 5:4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be trig-
gered when writing EEPE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
Bit 15141312 11 10 9 8
0x22 (0x42)
– – – – EEAR11 EEAR10 EEAR9 EEAR8 EEARH
0x21 (0x41) EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 EEARL
7654 3 2 10
Read/Write R R R R R/W R/W R/W R/W
R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 X X X X
XXXX X X XX
Bit 76543210
0x20 (0x40) MSB LSB EEDR
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 765432 10
0x1F (0x3F)
– – EEPM1 EEPM0 EERIE EEMPE EEPE EERE EECR
Read/Write R R R/W R/W R/W R/W R/W R/W
Initial Value 0 0 X X 0 0 X 0