Datasheet

137
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
A FOCnA/FOCnB strobe will not generate any interrupt nor will it clear the timer in Clear Timer
on Compare match (CTC) mode using OCRnA as TOP.
The FOCnA/FOCnB bits are always read as zero.
16.12.4 TCNT1H and TCNT1L –Timer/Counter1
The two Timer/Counter I/O locations (TCNT1H and TCNT1L, combined TCNT1) give direct
access, both for read and for write operations, to the Timer/Counter unit 16-bit counter. To
ensure that both the high and low bytes are read and written simultaneously when the CPU
accesses these registers, the access is performed using an 8-bit temporary High Byte Register
(TEMP). This temporary register is shared by all the other 16-bit registers. See “Accessing 16-bit
Registers” on page 113.
Modifying the counter (TCNT1) while the counter is running introduces a risk of missing a com-
pare match between TCNT1 and one of the OCRnx Registers.
Writing to the TCNT1 Register blocks (removes) the compare match on the following timer clock
for all compare units.
16.12.5 TCNT3H and TCNT3L –Timer/Counter3
The two Timer/Counter I/O locations (TCNT3H and TCNT3L, combined TCNT3) give direct
access, both for read and for write operations, to the Timer/Counter unit 16-bit counter. To
ensure that both the high and low bytes are read and written simultaneously when the CPU
accesses these registers, the access is performed using an 8-bit temporary High Byte Register
(TEMP). This temporary register is shared by all the other 16-bit registers. See “Accessing 16-bit
Registers” on page 113.
Modifying the counter (TCNT3) while the counter is running introduces a risk of missing a com-
pare match between TCNT3 and one of the OCRnx Registers.
Writing to the TCNT3 Register blocks (removes) the compare match on the following timer clock
for all compare units.
16.12.6 OCR1AH and OCR1AL – Output Compare Register1 A
Bit 76543210
(0x85) TCNT1[15:8] TCNT1H
(0x84) TCNT1[7:0] TCNT1L
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
(0x95) TCNT3[15:8] TCNT3H
(0x94) TCNT3[7:0] TCNT3L
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
(0x89) OCR1A[15:8] OCR1AH
(0x88) OCR1A[7:0] OCR1AL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000