Datasheet
53
ATmega323(L)
1457E–11/01
power-up reset or wake-up from Power-down or Standby mode, the user should be
aware of the fact that this oscillator might take as long as one second to stabilize. The
user is advised to wait for at least one second before using Timer/Counter2 after power-
up or wake-up from Power-down or Standby mode. The contents of all Timer/Counter2
registers must be considered lost after a wake-up from Power-down or Standby mode
due to unstable clock signal upon start-up, no matter whether the oscillator is in use or a
clock signal is applied to the TOSC1 pin.
Description of wake up from Power-save or Extended Standby mode when the timer is
clocked asynchronously: When the interrupt condition is met, the wake up process is
started on the following cycle of the timer clock, that is, the timer is always advanced by
at least one before the processor can read the counter value. After wake-up, the MCU is
halted for four cycles, it executes the interrupt routine, and resumes execution from the
instruction following SLEEP.
During asynchronous operation, the synchronization of the interrupt flags for the asyn-
chronous timer takes 3 processor cycles plus one timer cycle. The timer is therefore
advanced by at least one before the processor can read the timer value causing the set-
ting of the interrupt flag. The output compare pin is changed on the timer clock and is not
synchronized to the processor clock.
16-bit Timer/Counter1 Figure 36 shows the block diagram for Timer/Counter1.
Figure 36. Timer/Counter1 Block Diagram
The 16-bit Timer/Counter1 can select clock source from CK, prescaled CK, or an exter-
nal pin. In addition it can be stopped as described in section “Timer/Counter1 Control
8-BIT DA
TA BUS
T/C1 CONTROL
REGISTER B (TCCR1B)
T/C1 CONTROL
REGISTER A (TCCR1A)
T/C1 INPUT CAPTURE REGISTER (ICR1)
16 BIT COMPARATOR
16 BIT COMPARATOR
TIMER/COUNTER1 OUTPUT COMPARE REGISTER A
TIMER/COUNTER1 OUTPUT COMPARE REGISTER B
TIMER/COUNTER1 (TCNT1)
TIMER INT. FLAG
REGISTER (TIFR)
0
0
0
0
0
0
7
7
7
7
7
7
8
8
8
8
8
8
15
15
15
15
15
15
CONTROL
LOGIC
COM1A1
COM1B1
CS12
TOV1
TOV1
TOV0
OCF1A
OCF1A
OCF1B
OCF1B
ICF1
ICF1
COM1A0
COM1B0
CS11
CTC1
PWM11
PWM10
ICES1
ICNC1
CS10
CK
T/C1 COMPARE
MATCH A IRQ
T/C1 COMPARE
MATCH B IRQ
T/C1 INPUT
CAPTURE IRQ
T/C1 OVER-
FLOW IRQ
CAPTURE
TRIGGER
T/C CLOCK SOURCE
T/C CLEAR
UP/DOWN
TIMER INT. MASK
REGISTER (TIMSK)
TOIE0
TOIE1
OCIE1A
OCIE1B
TICIE1
TOIE2
TOV2
OCIE2
OCF2
FOC1A
FOC1B
PSR10
OCIE0
OCF0
T1