Datasheet

13
ATmega323(L)
1457E–11/01
Figure 9. SRAM Organization
The Program and Data
Addressing Modes
The ATmega323 AVR Enhanced RISC microcontroller supports powerful and efficient
addressing modes for access to the program memory (Flash) and data memory (SRAM,
Register File, and I/O Memory). This section describes the different addressing modes
supported by the AVR architecture. In the figures, OP means the operation code part of
the instruction word. To simplify, not all figures show the exact location of the address-
ing bits.
Register Direct, Single
Register Rd
Figure 10. Direct Single Register Addressing
The operand is contained in register d (Rd).
Register File
R0
R1
R2
R29
R30
R31
I/O Registers
$00
$01
$02
...
$3D
$3E
$3F
...
$0000
$0001
$0002
$001D
$001E
$001F
$0020
$0021
$0022
...
$005D
$005E
$005F
...
Data Address Space
$0060
$0061
$085E
$085F
...
Internal SRAM