Datasheet
45
ATmega323(L)
1457E–11/01
Figure 33. Timer/Counter2 Block Diagram
The 8-bit Timer/Counter0 can select clock source from CK, prescaled CK, or an external
pin.
The 8-bit Timer/Counter2 can select clock source from CK, prescaled CK, external
TOSC1 or prescaled external TOSC1.
Both Timers/Counters can be stopped as described in section “Timer/Counter0 Control
Register – TCCR0” on page 46 and “Bit 7 - FOC0/FOC2: Force Output Compare” on
page 46.
The various status flags (overflow and compare match) are found in the Timer/Counter
Interrupt Flag Register
– TIFR (see page 35). Control signals are found in the
Timer/Counter Control Register
– TCCR0 and TCCR2. The interrupt enable/disable set-
tings are found in the Timer/Counter Interrupt Mask Register
– TIMSK (see page 34).
When Timer/Counter0 is externally clocked, the external signal is synchronized with the
oscillator frequency of the CPU. To assure proper sampling of the external clock, the
minimum time between two external clock transitions must be at least one internal CPU
clock period. The external clock signal is sampled on the rising edge of the internal CPU
clock.
The 8-bit Timer/Counters feature both a high-resolution and a high-accuracy usage with
the lower prescaling opportunities. Similarly, the high-prescaling opportunities make the
Timer/Counter0 useful for lower speed functions or exact timing functions with infre-
quent actions.
8-BIT DATA BUS
8-BIT ASYNCH T/C2 DATA BUS
ASYNCH. STATUS
REGISTER (ASSR)
TIMER INT. FLAG
REGISTER (TIFR)
TIMER/COUNTER2
(TCNT2)
SYNCH UNIT
8-BIT COMPARATOR
OUTPUT COMPARE
REGISTER2 (OCR2)
TIMER INT. MASK
REGISTER (TIMSK)
0
0
0
7
7
7
T/C CLK SOURCE
UP/DOWN
T/C CLEAR
CONTROL
LOGIC
TOV0
TOV1
OCF1B
OCF1A
ICF1
TOV2
OCF2
OCF2
TOV2
TOIE0
TOIE1
OCIE1A
OCIE1B
TICIE1
TOIE2
OCIE2
OCR2UB
TC2UB
ICR2UB
CK
CK
PCK2
T/C2 OVER-
FLOW IRQ
T/C2 COMPARE
MATCH IRQ
T/C2 CONTROL
REGISTER (TCCR2)
CS22
COM21
PWM2
AS2
CS21
COM20
CS20
CTC2
FOC2
TOSC1
PSR2
PSR10
SPECIAL FUNCTIONS
IO REGISTER (SFIOR)
OCIE0
OCF0