Datasheet
3
ATmega323(L)
1457E–11/01
Overview The ATmega323 is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock cycle,
the ATmega323 achieves throughputs approaching 1 MIPS per MHz allowing the sys-
tem designer to optimize power consumption versus processing speed.
Block Diagram Figure 1. Block Diagram
PROGRAM
COUNTER
INTERNAL
OSCILLATOR
WATCHDOG
TIMER
STACK
POINTER
PROGRAM
FLASH
MCU CONTROL
REGISTER
SRAM
GENERAL
PURPOSE
REGISTERS
INSTRUCTION
REGISTER
TIMER/
COUNTERS
INSTRUCTION
DECODER
DATA DIR.
REG. PORTB
DATA DIR.
REG. PORTA
DATA DIR.
REG. PORTD
DATA DIR.
REG. PORTC
DATA REGISTER
PORTB
DATA REGISTER
PORTA
ANALOG MUX
ADC
DATA REGISTER
PORTD
DATA REGISTER
PORTC
PROGRAMMING
LOGIC
TIMING AND
CONTROL
OSCILLATOR
OSCILLATOR
INTERRUPT
UNIT
EEPROM
SPI
USART
STATUS
REGISTER
Z
Y
X
ALU
PORTB DRIVERS
PORTA DRIVERS
PORTD DRIVERS
PORTC DRIVERS
PB0 - PB7
PA0 - PA7
RESET
VCC
AVCC
AGND
AREF
GND
XTAL2
XTAL1
CONTROL
LINES
+
-
ANALOG
COMPARATOR
PD0 - PD7
PC0 - PC7
8-BIT DATA BUS
INTERNAL
REFERENCE
INTERNAL
CALIBRATED
OSCILLATOR
2-WIRE SERIAL
INTERFACE
JTAG
INTERFACE