Datasheet

25
ATmega323(L)
1457E11/01
When the BOOTRST fuse is programmed, the boot section size set to 4K bytes and the
IVSEL bit in the GICR register is set before any interrupts are enabled, the most typical
and general program setup for the Reset and Interrupt Vector Addresses are:
Address Labels Code Comments
$000 MAIN: ldi r16,high(RAMEND); Main program start
$001 out SPH,r16 ; Set stack pointer to top of RAM
$002 ldi r16,low(RAMEND)
$003 out SPL,r16
$004 <instr> xxx
;
.org $3800
$3800 jmp RESET ; Reset handler
$3802 jmp EXT_INT0 ; IRQ0 Handler
$3804 jmp EXT_INT1 ; IRQ1 Handler
... ... ... ;
$3826 jmp TWSI ; 2-wire Serial Interface Interrupt Handler
Reset Sources The ATmega323 has five sources of reset:
Power-on Reset. The MCU is reset when the supply voltage is below the Power-on
Reset threshold (V
POT
).
External Reset. The MCU is reset when a low level is present on the RESET pin for
more than 500 ns.
Watchdog Reset. The MCU is reset when the Watchdog timer period expires and
the Watchdog is enabled.
Brown-out Reset. The MCU is reset when the supply voltage V
CC
is below the
Brown-out Reset threshold (V
BOT
).
JTAG AVR Reset. The MCU is reset as long as there is a logic one in the Reset
Register, one of the scan chains of the JTAG system.
During reset, all I/O registers are set to their initial values, and the program starts execu-
tion from the Reset Vector. The instruction placed at the Reset Vector must be a JMP
absolute jump instruction to the reset handling routine. If the program never enables
an interrupt source, the interrupt vectors are not used, and regular program code can be
placed at these locations. This is also the case if the Reset Vector is in the Application
section while the interrupt vectors are in the boot section or vice versa. The circuit dia-
gram in Figure 24 shows the reset logic. Table 5 and Table 6 define the timing and
electrical parameters of the reset circuitry.