Datasheet

184
ATmega323(L)
1457E11/01
Enter Programming Mode The following algorithm puts the device in parallel programming mode:
1. Apply 4.5 - 5.5V between V
CC
and GND.
2. Set RESET and BS1 pins to 0 and wait at least 100 ns.
3. Apply 11.5 - 12.5V to RESET. Any activity on BS1 within 100 ns after +12V has
been applied to RESET
, will cause the device to fail entering programming mode.
Chip Erase The Chip Erase command will erase the Flash and EEPROM memories and the Lock
bits. The Lock bits are not reset until the program memory has been completely erased.
The Fuse bits are not changed. A Chip Erase must be performed before the Flash is
reprogrammed.
Load Command Chip Erase
1. Set XA1, XA0 to 10. This enables command loading.
2. Set BS1 to 0.
PAGEL PD7 I Program Memory Page Load
BS2 PA0 I Byte Select 2 (
0 Selects Low Byte, 1 Selects 2
nd High Byte)
DATA PB7-0 I/O Bidirectional Data Bus (Output When OE is Low)
Table 65. XA1 and XA0 Coding
XA1 XA0 Action When XTAL1 is Pulsed
0 0 Load Flash or EEPROM Address (High or Low Address Byte
Determined by BS1)
0 1 Load Data (High or Low Data Byte for Flash Determined by BS1)
1 0 Load Command
1 1 No Action, Idle
Table 66. Command Byte Bit Coding
Command Byte Command Executed
1000 0000 Chip Erase
0100 0000 Write Fuse Bits
0010 0000 Write Lock Bits
0001 0000 Write Flash
0001 0001 Write EEPROM
0000 1000 Read Signature Bytes
0000 0100 Read Fuse and Lock Bits
0000 0010 Read Flash
0000 0011 Read EEPROM
Table 64. Pin Name Mapping
Signal Name in
Programming Mode
Pin
Name I/O Function