Datasheet
181
ATmega323(L)
1457E–11/01
Program and Data
Memory Lock Bits
The ATmega323 provides six Lock bits which can be left unprogrammed (“1”) or can be
programmed (“0”) to obtain the additional features listed in Table 63. The Lock bits can
only be erased to “1” with the Chip Erase command.
Note: 1. Program the Fuse bits before programming the Lock bits.
Table 63. Lock Bit Protection Modes
Memory Lock Bits
Protection TypeLB mode LB2 LB1
1 1 1 No memory lock features enabled for parallel, serial, and
JTAG programming.
2 1 0 Further programming of the Flash and EEPROM is
disabled in parallel, serial, and JTAG programming mode.
The Fuse bits are locked in both serial and parallel
programming mode.
(1)
3 0 0 Further programming and verification of the Flash and
EEPROM is disabled in parallel, serial, and JTAG
programming mode. The Fuse bits are locked in both
serial and parallel programming mode.
(1)
BLB0 mode BLB02 BLB01
1 1 1 No restrictions for SPM or LPM accessing the Application
section.
2 1 0 SPM is not allowed to write to the Application section.
3 0 0 SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If interrupt
vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
4 0 1 LPM executing from the Boot Loader section is not
allowed to read from the Application section. If interrupt
vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
BLB1 mode BLB12 BLB11
1 1 1 No restrictions for SPM or LPM accessing the Boot Loader
section.
2 1 0 SPM is not allowed to write to the Boot Loader section.
3 0 0 SPM is not allowed to write to the Boot Loader section,
and LPM executing from the Application section is not
allowed to read from the Boot Loader section. If interrupt
vectors are placed in the Application section, interrupts
are disabled while executing from the Boot Loader section.
4 0 1 LPM executing from the Application section is not allowed
to read from the Boot Loader section. If interrupt vectors
are placed in the Application section, interrupts are
disabled while executing from the Boot Loader section.