Datasheet

176
ATmega323(L)
1457E11/01
Note: 1 means unprogrammed, 0 means programmed
Note: 1 means unprogrammed, 0 means programmed
Setting the Boot Loader Lock
Bits by SPM
To set the Boot Loader Lock bits, write the desired data to R0, write 00001001 to
SPMCR and execute SPM within four clock cycles after writing SPMCR. The only
accessible lock bits are the Boot Lock bits that may prevent the Application and Boot
Loader section from any software update by the MCU.
If bits 5..2 in R0 are cleared (zero), the corresponding Boot Lock Bit will be programmed
if an SPM instruction is executed within four cycles after BLBSET and SPMEN are set in
SPMCR.
Reading the Fuse and Lock
Bits from Software
It is possible to read both the Fuse and Lock bits from software. To read the Lock bits,
load the Z pointer with $0001 and set the BLBSET and SPMEN bits in SPMCR. When
an LPM instruction is executed within five CPU cycles after the BLBSET and SPMEN
bits are set in SPMCR, the value of the Lock bits will be loaded in the destination regis-
ter. The BLBSET and SPMEN bits will auto-clear upon completion of reading the Lock
bits or if no SPM, or LPM, instruction is executed within four, respectively five, CPU
cycles. When BLBSET and SPMEN are cleared, LPM will work as described in Con-
Table 61. Boot Lock Bit0 Protection Modes (Application Section)
BLB0 Mode BLB02 BLB01 Protection
1 1 1 No restrictions for SPM or LPM accessing the Application
section.
2 1 0 SPM is not allowed to write to the Application section.
3 0 0 SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If interrupt
vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
4 0 1 LPM executing from the Boot Loader section is not
allowed to read from the Application section. If interrupt
vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
Table 62. Boot Lock Bit1 Protection Modes (Boot Loader Section)
BLB1 mode BLB12 BLB11 Protection
1 1 1 No restrictions for SPM or LPM accessing the Boot Loader
section.
2 1 0 SPM is not allowed to write to the Boot Loader section.
3 0 0 SPM is not allowed to write to the Boot Loader section,
and LPM executing from the Application section is not
allowed to read from the Boot Loader section. If interrupt
vectors are placed in the Application section, interrupts
are disabled while executing from the Boot Loader section.
4 0 1 LPM executing from the Application section is not allowed
to read from the Boot Loader section. If interrupt vectors
are placed in the Application section, interrupts are
disabled while executing from the Boot Loader section.
Bit 76543210
R0 1 1 BLB12 BLB11 BLB02 BLB01 1 1