Datasheet
16
ATmega323(L)
1457E–11/01
Data Indirect with
Post-increment
Figure 17. Data Indirect Addressing With Post-increment
The X-, Y-, or the Z-register is incremented after the operation. Operand address is the
content of the X-, Y-, or the Z-register prior to incrementing.
Constant Addressing Using
the LPM and SPM Instructions
Figure 18. Code Memory Constant Addressing
Constant byte address is specified by the Z-register contents. The 15 MSBs select word
address (0 - 16K). For LPM, the LSB selects low byte if cleared (LSB = 0) or high byte if
set (LSB = 1). For SPM, the LSB should be cleared.
Indirect Program Addressing,
IJMP and ICALL
Figure 19. Indirect Program Memory Addressing
Data Space
$0000
X, Y OR Z - REGISTER
015
1
$085F
$3FFF
$3FFF