Datasheet

157
ATmega323(L)
1457E–11/01
mentation and JTAG instructions are therefore irrelevant for the user of the On-Chip
Debug system.
The JTAGEN fuse must be programmed to enable the JTAG Test Access Port. In addi-
tion, the OCDEN fuse must be programmed and no lock bits must be set for the On-
Chip debug system to work. The disabling of the On-Chip debug system when any lock
bits are set is a security feature. Otherwise, the On-Chip debug system would have pro-
vided a back-door into a secured device.
The AVR Studio enables the user to fully control execution of programs on an AVR
device with On-Chip Debug capability, AVR In-Circuit Emulator, or the built-in AVR
Instruction Set Simulator. AVR Studio supports source level execution of Assembly pro-
grams assembled with Atmel Corporation’s AVR Assembler and C programs compiled
with 3rd party vendors’ compilers.
AVR Studio runs under Microsoft Windows 95/98/2000 and Microsoft Windows NT.
For a full description of the AVR Studio, please refer to the AVR Studio User Guide.
Only highlights are presented in this document.
All necessary execution commands are available in AVR Studio, both on source level
and on disassembly level. The user can execute the program, single step through the
code either by tracing into or stepping over functions, step out of functions, place the
cursor on a statement and execute until the statement is reached, stop the execution,
and reset the execution target. In addition, the user can have up to 2 data memory
breakpoints, alternatively combined as a mask (range) break-point.
On-chip Debug Specific
JTAG Instructions
The On-Chip debug support is considered being private JTAG instructions, and distrib-
uted within ATMEL and to selected 3rd party vendors only. Instruction opcode listed for
reference.
PRIVATE0; $8 Private JTAG instruction for accessing On-Chip debug system.
PRIVATE1; $9 Private JTAG instruction for accessing On-Chip debug system.
PRIVATE2; $A Private JTAG instruction for accessing On-Chip debug system.
PRIVATE3; $B Private JTAG instruction for accessing On-Chip debug system.
Using the JTAG
Programming
Capabilities
Programming of AVR parts via JTAG is performed via the four-pin JTAG port, TCK,
TMS, TDI and TDO. These are the only pins that need to be controlled/observed to per-
form JTAG programming (in addition to power pins). It is not required to apply 12V
externally. The JTAGEN fuse must be programmed and the JTD bit in the MCUSR reg-
ister must be cleared to enable the JTAG Test Access Port.
The JTAG programming capability supports:
• Flash programming and verifying
• EEPROM programming and verifying
• Fuse programming and verifying
• Lock bit programming and verifying
The lock bit security is exactly as in parallel programming mode. If the lock-bits LB1 or
LB2 are programmed, the OCDEN Fuse cannot be programmed unless first doing a
chip erase. This is a security feature that ensures no back-door exists for reading out the
content of a secured device.