Datasheet

143
ATmega323(L)
1457E11/01
The Port C Data Register
PORTC
The Port C Data Direction
Register DDRC
The Port C Input Pins Address
PINC
The Port C Input Pins address
PINC is not a register, and this address enables
access to the physical value on each Port C pin. When reading PORTC, the Port C Data
Latch is read, and when reading PINC, the logical values present on the pins are read.
Port C As General Digital I/O All 8 bits in Port C are equal when used as digital I/O pins.
PCn, General I/O pin: The DDCn bit in the DDRC register selects the direction of this
pin, if DDCn is set (one), PCn is configured as an output pin. If DDCn is cleared (zero),
PCn is configured as an input pin. If PORTCn is set (one) when the pin configured as an
input pin, the MOS pull up resistor is activated. To switch the pull up resistor off,
PORTCn has to be cleared (zero), the pin has to be configured as an output pin, or the
PUD bit has to be set. The Port C pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
Note: n: 70, pin number
If the JTAG interface is enabled, the pull-up resistors on pins PC5 (TDI), PC3 (TMS) and
PC2 (TCK) will be activated even if a reset occurs.
Bit 76543210
$15 ($35)
PORTC7 PORTC6 PORTC5 PORTC4 PORTC3 PORTC2 PORTC1 PORTC0 PORTC
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
$14 ($34)
DDC7 DDC6 DDC5 DDC4 DDC3 DDC2 DDC1 DDC0 DDRC
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
$13 ($33)
PINC7 PINC6 PINC5 PINC4 PINC3 PINC2 PINC1 PINC0 PINC
Read/WriteRRRRRRRR
Initial Value N/A N/A N/A N/A N/A N/A N/A N/A
Table 52. DDCn Effects on Port C Pins
DDCn PORTCn
PUD
(in SFIOR) I/O Pull-up Comments
0 0 X Input No Tri-state (Hi-Z)
0 1 0 Input Yes
PCn will Source Current if Ext. Pulled
Low.
0 1 1 Input No Tri-state (Hi-Z)
1 0 X Output No Push-pull Zero Output
1 1 X Output No Push-pull One Output