Datasheet
14
ATmega323(L)
1457E–11/01
Register Direct, Two Registers
Rd and Rr
Figure 11. Direct Register Addressing, Two Registers
Operands are contained in register r (Rr) and d (Rd). The result is stored in register d
(Rd).
I/O Direct Figure 12. I/O Direct Addressing
Operand address is contained in 6-bits of the instruction word. n is the destination or
source register address.
Data Direct Figure 13. Direct Data Addressing
A 16-bit Data Address is contained in the 16 LSBs of a two-word instruction. Rd/Rr
specify the destination or source register.
OP Rr/Rd
16
31
15 0
16 LSBs
$0000
$085F
20 19
Data Space