Datasheet
124
ATmega323(L)
1457E–11/01
Analog to Digital
Converter
Features • 10-bit Resolution
• 0.5 LSB Integral Non-linearity
• ±2 LSB Absolute Accuracy
• 65 - 260 µs Conversion Time
• Up to 15 kSPS at Maximum Resolution
• Up to 76 kSPS at 8-bit Resolution
• Eight Multiplexed Single Ended Input Channels
• Optional Left Adjustment for ADC Result Readout
• 0 - VCC ADC Input Voltage Range
• Selectable 2.56V ADC Reference Voltage
• Free Run or Single Conversion Mode
• Interrupt on ADC Conversion Complete
• Sleep Mode Noise Canceler
The ATmega323 features a 10-bit successive approximation ADC. The ADC is con-
nected to an 8-channel Analog Multiplexer which allows each pin of Port A to be used as
input for the ADC.
The ADC contains a Sample and Hold Amplifier which ensures that the input voltage to
the ADC is held at a constant level during conversion. A block diagram of the ADC is
shown in Figure 60.
The ADC has two separate analog supply voltage pins, AVCC and AGND. AGND must
be connected to GND, and the voltage on AV
CC
must not differ more than ±0.3V from
V
CC
. See the paragraph ADC Noise Canceling Techniques on how to connect these
pins.
Internal reference voltages of nominally 2.56V or AV
CC
are provided On-chip. The 2.56V
reference may be externally decoupled at the AREF pin by a capacitor for better noise
performance. See “Internal Voltage Reference” on page 31 for a description of the inter-
nal voltage reference.