Datasheet

118
ATmega323(L)
1457E11/01
Figure 58. Formats and States in the Slave Transmitter Mode
Assembly Code Example
Slave Transmitter Mode
; Part specific include file and TWI include file must be included.
; <Initialize registers, including TWAR, TWBR and TWCR>
ldi r16, (1<<TWINT) | (1<<TWEA) | (1<<TWEN)
out TWCR, r16 ; Enable TWI in Slave Transmitter Mode
; <Receive START condition and SLA+R>
wait14:in r16,TWCR ; Wait for TWINT flag set. This indicates that
sbrs r16, TWINT ; SLA+R has been received, and ACK/NACK has
rjmp wait14 ; been returned
in r16, TWSR ; Check value of TWI Status Register. If status
cpi r16, ST_SLA_ACK ; different from ST_SLA_ACK, go to ERROR
brne ERROR
ldi r16, 0x33 ; Load data(here, data=0x33)into TWDR register
out TWDR, r16
ldi r16, (1<<TWINT) | (1<<TWEA) | (1<<TWEN)
out TWCR, r16 ; Clear TWINT bit in TWCR to start transmission
; of data. Setting TWEA indicates that ACK
; should be received when transfer finished
; <Send more data bytes if needed>
wait15:in r16,TWCR ; Wait for TWINT flag set. This indicates that
sbrs r16, TWINT ; data has been transmitted, and ACK/NACK has
rjmp wait15 ; been received
in r16, TWSR ; Check value of TWI Status Register. If status
cpi r16, ST_DATA_ACK ; different from ST_DATA_ACK, go to ERROR
brne ERROR
S SLA R A DATA A
$A8 $B8
A
$B0
Reception of the
own slave address
and one or
more data bytes
Last data byte transmitted.
Switched to not addressed
slave (TWEA = '0')
Arbitration lost as master
and addressed as slave
n
From master to slave
From slave to master
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus
P or SDATA
$C0
DATA A
A
$C8
P or SAll 1's
A