Datasheet

109
ATmega323(L)
1457E11/01
Figure 55. Formats and States in the Master Transmitter Mode
Assembly Code Example
Master Transmitter Mode
;The slave being addressed has address 0x64. The code examples also assumes
some sort of error handling routine named ERROR.
;Part specific include file and TWI include file must be included.
; <Initialize registers, including TWAR, TWBR and TWCR>
ldi r16, (1<<TWSTA) | (1<<TWEN)
out TWCR, r16 ; Send START condition
wait1: in r16,TWCR ; Wait for TWINT flag set. This indicates that
sbrs r16,TWINT ; the START condition has been transmitted
rjmp wait1
in r16, TWSR ; Check value of TWI Status Register.
cpi r16, START ; If status different from START go to ERROR
brne ERROR
S SLA W A DATA A P
$08
$18 $28
S SLA W
$10
AP
$20
P
$30
A or A
$38
A
Other master
continues
A or A
$38
Other master
continues
R
A
$68
Other master
continues
$78 $B0
To corresponding
states in slave mode
MT
MR
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Not acknowledge
received after a data
byte
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
DATA A
n
From master to slave
From slave to master
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus